MIPI TX CPHY_v1.0 / DPHY_v1.2, 3-TRIO/1C4D, HLMC 55HR
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC N7A, 1.8V, E/W orientation(ASIL-B)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC N5A, 1.2V, E/W orientation(ASIL-B)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 16FFC, E/W orientation(ASIL-B)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.2 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 22ULL 1.8V, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.2 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 16FFC, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.2 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI RX CPHY_v1.0 / DPHY_v1.2, 3-TRIO/1C4D, TSMC 28HPC+, E/W orientation
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP in TSMC
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI C-PHY/D-PHY Combo v1.2 IP in TSMC(5nm, 7nm, 12/16nm, 28nm and 40nm)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.
MIPI D-PHY RX/TX v1.1 / v1.2 IP in TSMC (12/16nm, 28nm, 40nm, and 55nm process)
The D-PHY is a popular MIPI physical layer developed for mobile applications because it is a flexible, high-speed, low-power and …
2D Graphics Hardware Accelerator (AXI Bus)
The Digital Blocks DB9200AXI 2D Graphics Hardware Accelerator / Engine Verilog IP Core renders graphics frames as follows: Genera…
USB 3.1/DisplayPort 1.3 Controller IP Solutions
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1/DisplayPort 1.4 IP Subsystem Solution
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1/DP TX PHY in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1 DP/TX PHY ebdaux in TSMC (N5, N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1 SS/SSP PHY in Type-C in TSMC (16nm, 12nm, N7, N6, N5, N5A)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.