The UCIe 2.0 Verification IP offers a streamlined and efficient solution for verifying UCIe components within an IP or SoC.
- Verification IP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The UCIe 2.0 Verification IP offers a streamlined and efficient solution for verifying UCIe components within an IP or SoC.
The CXS Verification IP provides an effective & efficient way to verify CXS ON Chip or OFF Chip interface.
1G to 50G Single-Port MACsec Engine with xMII interface and TSN support
The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem.
The ICE-IP-63 (EIP-63) is a scalable high-performance, multi-channel cryptographic engine that offers AES-GCM operations as well …
High-speed Inline Cipher Engine
The ICE-IP-338 (EIP-338) Inline Cipher Engine is a scalable, high-performance, multi-stream inline cryptographic engine that offe…
Inline cipher engine with AXI, for memory encryption
Modern computing architectures must address increasing concerns regarding off-chip data confidentiality.
Inline memory encryption engine, for FPGA
IME-IP-340 Inline Memory Encryption (IME) Engine provides just-in-time encryption, decryption and authentication for all memory r…
Programmable Root of Trust With DPA and FIA for US Defense
The Rambus Root of Trust RT-1660 is a fully programmable, FIPS 140-3 compliant root-of-security core offering security by design …
PCIe Controller for USB4 with AXI
The PCIe Controller for USB4 (formerly XpressRICH) is a configurable and scalable PCIe controller IP designed for ASIC and FPGA i…
The PCIe Controller for USB4 (formerly XpressRICH) is a configurable and scalable PCIe controller IP designed for ASIC and FPGA i…
The ARINC 429 IP is a high-performance solution for integrating ARINC 429 data buses into avionics systems.
Fast NIST ESV certified, FIPS (SP800-90A/B/C) True Random Number Generator
The TRNG-IP-77 is a FIPS-compliant and certified IP core for True Random Number Generation (TRNG) with an optional post-processor…
JPEG XS Decoder (FPGA) - Performance-oriented version
TMC’s JPEG XS IP maximizes the advantages of FPGAs and helps customers improve the competitiveness of their products.
JPEG XS Decoder (FPGA) - Standard version
TMC’s JPEG XS IP maximizes the advantages of FPGAs and helps customers improve the competitiveness of their products.
JPEG XS Encoder (FPGA) - Performance-oriented version
TMC’s JPEG XS IP maximizes the advantages of FPGAs and helps customers improve the competitiveness of their products.
JPEG XS Encoder (FPGA) - Standard version
TMC’s JPEG XS IP maximizes the advantages of FPGAs and helps customers improve the competitiveness of their products.
JPEG XS compression IP core for HD - Max fps: 480 - Color sampling: 4:2:2 / 4:0:0
intoPIX has developed various optimized TicoXS architectures running a different pixel per clock to target a wide range of resolu…
JPEG XS compression IP core for HD - Max fps: 120- Color sampling: 4:4:4 / 4:2:2 / 4:0:0
intoPIX has developed various optimized TicoXS architectures running a different pixel per clock to target a wide range of resolu…
JPEG XS compression IP core for HD - Max fps: 120- Color sampling: 4:2:2 / 4:0:0
intoPIX has developed various optimized TicoXS architectures running a different pixel per clock to target a wide range of resolu…
JPEG XS compression IP core for HD - Max fps: 60 - Color sampling: 4:4:4 / 4:2:2 / 4:0:0
intoPIX has developed various optimized TicoXS architectures running a different pixel per clock to target a wide range of resolu…