8-bit <=25GSa/s High-speed Low power ADC in 16nm TSMC CMOS
Originally developed for high speed optical communication systems but used in many other applications Low power consumption Small…
8-bit <=51GSa/s Ultra-high-speed ADC in 16nm TSMC CMOS
Originally developed for high speed optical communication systems but used in many other applications Low power consumption Small…
8-bit >100GSa/s Ultra-high-speed ADC in 16nm TSMC CMOS
ADC IP Macro.
The Synopsys SuperSpeed USB IP solution is implemented in hundreds of designs and shipped in millions of units.
The SONY_CAM_IF IP Core provides a simple way to connect the Sony® FCB-EV range of cameras to your FPGA.
All Digital Fractional-N RF Frequency Synthesizer PLL in GlobalFoundries 12LPP/14LPP
The DeepSub™ pPLL08F is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…
All Digital Fractional-N RF Frequency Synthesizer PLL in UMC 40LP
The DeepSub™ pPLL08F is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…
Industry , Silicon Proven, 32.5 Gbps per lane IP core, backed by a portfolio of verification tools, PHY interop, and hardware dem…
USB 3.1 is the most recent version of the USB (Universal Serial Bus) standard for connecting electronic devices in host and devic…
Serial Front Panel Data Port (sFPDP) IP Core
The sFPDP core provides a IP solution for the VITA 17.1-2015 sFPDP specification.
The 1394b PHY core includes all functionality needed to meet the AS5643 protocol, and provides a IP solution for the PHY layer of…
PCI Express x1, x4 Root Complex Lite IP Core
PCI Express is a high performance, fully scalable, well defined standard for a wide variety of computing and communications platf…
The Bitec HDMI 2.0b IP Core enables HDMI interconnectivity without the need for external HDMI ASSP devices.
MIPI M-PHY v3.1 IP, Silicon Proven in TSMC 28HPC+
The MIPI M-PHY Gear 3 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3…
The PCIe 5.0 Multi-port Switch (formerly XpressSWITCH) is a customizable, multiport embedded Switch for PCIe designed for ASIC an…
PLL IP, Input: 25MHz, Output: 156.25MHz, UMC 40nm LP process
Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency is 25M for Low-Jitter Mode, 156.25M for Ji…
The Fibre Channel (FC) Link Layer core provides a IP solution for FC Layer 1 and Layer 2.
Industry , Silicon Proven, 16 Gbps per lane IP core, backed by a portfolio of verification tools, PHY interop, and hardware demos…
SAS Initiator, 12G, 4 Ports, 48 Gbps
The SAS Initiator Controller IP Core provides an interface to high-speed serial link replacement for the parallel SCSI attachment…
This UHS2PHY IP solution for UHS-II interface that SD Association is working on the standardization as the new ultra high speed i…