DVB-S2 (Digital Video Broadcast – Satellite 2nd Generation) is an ETSI standard of the second generation for digital data transmi…
- Modulation Demodulation
- January 2014
- DVB-S2
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
DVB-S2 (Digital Video Broadcast – Satellite 2nd Generation) is an ETSI standard of the second generation for digital data transmi…
DVB-CID (Digital Video Broadcast - Carrier Identification System) is an ETSI standard for interference prevention within digital …
The D26C92 is a Dual UART Core software compatible with the SC26C92, SCC2692 and SCN2681 with added features and deeper FIFOs.
The D6840 is a programmable timer module, compatible with the 6840 industry standard.
Configurable UART with FIFO, hardware and software flow control
The D16752 is a universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs and automatic hardware/software flow contro…
DVB-RCS (Digital Video Broadcasting – Interaction channel for satellite distribution systems) is an established ETSI standard for…
Phase frequency detector and charge pump
The device consists of phase frequency detector (PFD), charge pump and lock detector (LD).
Temperature sensor consists of built-in 10-bit R-2R DAC, diode and own reference voltage former.
IEEE 802.11ad (WiGig 60GHz) LDPC Decoder
The WiGig standard (IEEE 802.11ad) delivers data rates of up to 7 Gbit/s and hence outperforms the current IEEE 802.11n standard …
MIMO (Multiple Input Multiple Output) techniques are being used more and more in recent and upcoming standards since they drastic…
The AR34S5C is a silicon-proven, low-power, ultra compact 16-22bit stereo audio CODEC IP fabricated in SMIC110nm logic process.
The AR34S4C is a silicon-proven, low-power, ultra compact 16-22bit stereo audio CODEC IP fabricated in SMIC130nm logic process.
Multi-channel codec to ASIC / FPGA
H.264 main profile real time encoder/decoder Ultrafast Architecture Excellent video quality Ultra Low latency
Ultra-low latency AVC Intra Codec
Jointwave's AVC Intra Codec just needs very low resource on both FPGA & ASIC.
H.264 High Profile 4:4:4 real time encoder/decoder Ultrafast Architecture Excellent video quality Ultra low latency Three configu…
H.264 high profile 4:2:2 real time encoder/decoder Ultrafast Architecture Excellent video quality Ultra low latency Three configu…
High profile 720p@30fps~1080p@240fps
H.264 High profile real time encoder/decoder Three configurations optional: 4:2:2 8bit 4:2:0 10bit 4:0:0 8/10/12 bit Ultrafast Ar…
Main Profile 720p@30fps~1080p@240fps
H.264 main profile real time encoder/decoder Configuration 4:2:0 8bit Ultrafast Architecture Excellent video quality Ultra low la…
IntelliProp’s SATA Device ADCI core (IPC-SA155A-DT) is an industry standard Serial-ATA (SATA) device interface core that allows c…
DVB-RCS2 (Digital Video Broadcast – Second Generation DVB Interactive Satellite System) is the latest ETSI standard of the second…