H.265/HEVC H.264/AVC 422 12bit Multi-Codec for 8K
This product supports up to 8K60fps and enables high-precision video processing, including YCbCr4:2:2 and 12-bit depth.
- H.264 / AVC + 1
- Encoder / Decoder (codec)
- 8 + 2
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
H.265/HEVC H.264/AVC 422 12bit Multi-Codec for 8K
This product supports up to 8K60fps and enables high-precision video processing, including YCbCr4:2:2 and 12-bit depth.
CCSDS AR4JA LDPC Encoder/Decoder
AR4JA LDPC decoder is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3, …
LDPC corrects errors caused by flash storage failure mechanisms.
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the inpu…
A Forward Error Correction (FEC) subsystem is needed in almost all wireless communication systems.
Synopsys HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard.
Designed to enable low power signal conditioning for IoT edge endpoints.
VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
The DisplayPort Forward Error Correction (FEC) Transmitter IP core implements Reed-Solomon FEC and symbol interleaving as specifi…
The NVMe IP core is compliant with NVM Express base specification revision 1.4 that performs memory transfer to or from the NVMe …
800 Gigabit Ethernet MAC + PCS
The 800Gbps Ethernet IP solution offers a fully integrated Ethernet Technology Consortium (ETC) compliant solution for use in cor…
TSMC 180nm 5V Bandgap
1Kx32 Bits OTP (One-Time Programmable) IP, TSMC 40ULP 1.1/2.5V Process
The AT1K32T40ULP6AA is organized as a 1K-bit by 32 one-time programmable (OTP).
512x8 Bits OTP (One-Time Programmable) IP, SMIC 110nm 1.2V/3.3V Mixed Signal Generic Process
The AT512X8Z110LL0AA is organized as a 512-bit by 8 one-time programmable (OTP).
256x8 Bits OTP (One-Time Programmable) IP, TSMC 0.13um 1.5V/3.3V LP Process
The AT256X8T130LP0AA is organized as a 256-bit by 8 one-time programmable (OTP).
256x1 Bits OTP (One-Time Programmable) IP, UMC 110 nm 1.2V/3.3V L110AE Process
The AT256X1U110MAE0AC is organized as a 256-bit by 1 one-time programmable (OTP).
Quad core IP platform with integrated Arm security subsystem
Sondrel has created a , quad core IP platform, the SFA 200, that is ideal for ASIC solutions for remote gathering and processing …
32x22 Bits OTP (One-Time Programmable) IP, X-Fab 0.18um XH018 1.8V/3.3V Process
The AT32X22B180GN0AA is organized as a 32 by 22 one-time programmable (OTP).
8Kx8 Bits OTP (One-Time Programmable) IP, VIS 0.15µm 1.8V/5V BCD GIII Process
The AT8K8V150BCD0DB is organized as an 8K-bit by 8 one-time programmable (OTP).
The ATO00256X1TS180MSG3NA is organized as a 256 bit by 1 one-time programmable (OTP).This is a kind of non-volatile memory fabric…
1x64 Bits OTP (One-Time Programmable) IP, GlobalFoundries 22nmFDX 0.8V/1.8V Process
The AT1X64G22FDX0AA is organized as a 1 by 64 one-time programmable (OTP).