100 dB of SNR, 24-bit stereo audio CODEC with headphone driver and digital mixer
Amidst a rich a-la-carte offering, shCODlp-100.02 is an optimized and configuration around high performance DAC and ADC cores whi…
SONET/SDH OC-12 Transceiver/CDR
The SMS2012 SONET/SDH is a fully integrated Clock Data Recovery (CDR) SONET OC-3 interface core designed for multiple integration…
112G Ethernet PHY in TSMC (N7, N5, N3P)
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth…
224G Ethernet PHY in TSMC (N3E)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth…
DDR3 and DDR4 Controller and PHY on TSMC 12nm
This DDR3/4 IP combo solution presented, is meticulously designed for high performance and low power consumption, utilizing sophi…
HDMI 2.1 RX PHY 12Gbps in TSMC 16FFC 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 RX PHY 12Gbps in TSMC 12FFC 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 Rx PHY 12Gbps in SS 14LPP, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 eARC TX PHY in TSMC 16FFC 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 eARC TX PHY in TSMC 12FFC 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 eARC Tx PHY in SS 14LPP 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 eARC RX PHY in TSMC 16FFC 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 eARC RX PHY in TSMC 12FFC 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
HDMI 2.1 eARC Rx PHY in GF 12LP 1.8V, North/South Poly Orientation
The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implem…
OSU/OTN processor, optimized for E1/STM1/OC3/STM4/OC12/FE/GE services over OTU0/OTU1 lines
The TPS3204MP OSU processor is an IP Core solution designed for Xilinx FPGAs.
8-bit <=120GSa/s Ultra-high-speed DAC in TSMC 16nm CMOS
DAC IP Macro.
8-bit <=25GSa/s High-speed Low power ADC in 16nm TSMC CMOS
Originally developed for high speed optical communication systems but used in many other applications Low power consumption Small…
8-bit <=51GSa/s Ultra-high-speed ADC in 16nm TSMC CMOS
Originally developed for high speed optical communication systems but used in many other applications Low power consumption Small…
8-bit >100GSa/s Ultra-high-speed ADC in 16nm TSMC CMOS
ADC IP Macro.
ATAN2_XY calculates the 4-quadrant inverse tangent in the range -π to π.