Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
- TSMC
- 5nm
- N5
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
GF 22FDX 5.5V OTP Auto-Grade1 IO Inline
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
NVM OTP XBC TSMC N5A 1.2V Automotive Grade 1 with Functional Safety
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
TSMC N3P 1.2V High-Speed Test IO
The AI and HPC industries are advancing toward chiplet-based designs to achieve superior performance, as traditional monolithic S…
Leveraging the benefits of USB 10Gbps and 5Gbps device controller, USB 20Gbps is designed using the FPGA built-in transceiver.
Multi-core capable 64-bit RISC-V CPU with vector extensions
The SiFive® Intelligence™ X180 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the fa…
Multi-core capable 32-bit RISC-V CPU with vector extensions
The SiFive® Intelligence™ X160 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the fa…
Multi-core capable RISC-V processor with vector extensions
The SiFive® Intelligence™ X280 Gen 2 is an 8-stage dual issue, in-order, superscalar design with wide vector processing (512 bit …
Cost effective Flash solution up for medium memory capacity requirement up to several 100KBytes
The agileEMSensor is a Ring Oscillator (RO) based sensor designed to detect electromagnetic fault injection (EMFI) attacks on cri…
Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
A radiation-hardened SkyWater 90nm GPIO, ODIO and LVDS Interface.
1.8V/3.3V GPIO With I2C Compliant ODIO in GF 55nm
GPIO, ODIO and Analog I/Os with Robust ESD Protection in GF 55nm This I/O Library, developed on GlobalFoundries 55nm CMOS, delive…
-40°C to +85°C Low power temperature sensor
The 180SMIC_TS_03 is a unique stand-alone solution intended to continuously monitor IC status.
0.9V SLVS Transceiver in TSMC 22nm
A 200Mbps 0.9V SLVS transceiver solution.