LCD Controller IP Listing

The AHB TFT LCD Controller is a configurable core that interfaces to an AHB microprocessor bus and provides all the timing contro…

• Display Controller
• Silicon Proven
• Now
• AHB

The DB9000AVLN TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the Avalon Bus within Altera Qs…

• Display Controller

The Digital Blocks DB9000AHB-Lite TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 3.0…

• Display Controller
• Successful in Company SoC Demo Reference Design & Customer Implementations
• Immediately
• AMBA 3.0 AHB-Lite Protocol …

The DB9000AXI4 LCD / OLED Display Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA AXI4 Protoc…

• Display Controller
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The DB9000AHB TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 2.0 AHB Bus to a TFT LC…

• Display Controller
• Successful in Company SoC Demo Reference Design & Customer Implementations
• Immediately
• AMBA 2.0

The DB9000AXI3 Display Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA AXI Protocol Interconn…

• Display Controller
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The Digital Blocks DB9200AHB 2D Graphics Hardware Accelerator Verilog IP Core renders graphics frames as follows: Generates bitma…

• GPU

The Digital Blocks DB9200AXI 2D Graphics Hardware Accelerator / Engine Verilog IP Core renders graphics frames as follows: Genera…

• GPU

The DB9200AXI4 2D Graphics Hardware Accelerator / Engine Verilog IP Core renders graphics frames as follows: Generates bitmaps fr…

• GPU
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder interfaces RGB data along with synchronization signals from a LCD Controller (or…

• Image Conversion
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The DB9100AVLN BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comma…

• GPU

The DB9100AXI4 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comma…

• GPU
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The DB9100AHB BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comman…

• GPU
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The DB9100AXI BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comman…

• GPU
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The AHB Single Channel DMA Controller core is a configurable single channel direct memory access controller.

• DMA

The AHB 4 Channel DMA Controller is a multiple-channel direct memory access controller.

• DMA
• AHB

The DMA is a configurable single channel direct memory access controller.

• DMA
• Silicon Proven
• Now
• AHB

The DB9000AXI-DCI LCD Controller IP Core interfaces a video image in frame buffer memory via the AMBA 3.0 / 4.0 AXI Protocol Inte…

• Display Controller
• Successful in Company FPGA Kit Demo Reference Design, Customer Products
• Immediately

The DB9000AXI4-UHD LCD Controller IP Core interfaces a video image in frame buffer memory via the AMBA 3.0 / 4.0 AXI Protocol Int…

• Display Controller

The Serial Peripheral Interface or SPI-bus is a simple 4- wire serial communications interface used by many peripheral chips that…

• SPI / QSPI XSPI