Comprehensive MAC-to-PCS Protocol Validation Solution The 100G Ethernet Verification IP (VIP) offers a robust and high-performanc…
- Verification IP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Comprehensive MAC-to-PCS Protocol Validation Solution The 100G Ethernet Verification IP (VIP) offers a robust and high-performanc…
The INTERLAKEN Verification IP Product is the comprehensive INTERLAKEN interface protocol validation solution.
Multi-Channel Streaming DMA Controller
The MC-SDMA IP core implements a configurable, bandwidth-efficient, and easy-to-use Direct Memory Access (DMA) controller that tr…
The NVMe 2.3 VIP is fully compliant with the latest NVMe specifications.
CXL 4.0/3.2/3/2 Verification IP
The CXL Verification IP provides an effective & efficient way to verify the components interfacing with CXL interface of an IP or…
ASIC proven high-performance, feature-rich network interface solution designed to deliver reliable, low-latency Ethernet connecti…
RSA2-AHB Accelerator Core with AHB Interface
Rivest-Shamir-Adelman (RSA) is a public-key cryptographic technology that uses the mathematics of so called “finite field exponen…
Accelerated confidence in simulation-based verification of RTL designs with Universal Chiplet Interconnect Express (UCIe) interfa…
Comprehensive memory model and PHY verification HBM VIP is a comprehensive memory VIP solution portfolio for high bandwidth memor…
Accelerated confidence in simulation-based verification of RTL designs with Ethernet networking interfaces Avery TSN Ethernet Ver…
Accelerated confidence in simulation-based verification of RTL designs with PCI Express (PCIe) interfaces: PCIe Gen2/3/4/5/6/7 Av…
Accelerated confidence in simulation-based verification of RTL designs with NVMe interfaces over PCIe or Fabric links The Avery N…
The FFT4T core implements a 128 point complex FFT and IFFT over 12 data streams in hardware.
APB Post-Quantum Cryptography Accelerator IP Core
Implements ML-KEM and ML-DSA post-quantum cryptography digital signature standards.
IGAHBMZ03A is a High Bandwidth Memory 4 Physical Layer (HBM4 PHY) that is compliant with JEDEC HBM4 DRAM Specification JESD270-4.
The Multi-Channel AXI DMA engine IP Core for AXI4 is a programmable AXI Stream to AXI memory mapped bridge with sophisticated dat…
Neuromorphic Processor IP (Second Generation)
Akida is a neural processor platform inspired by the cognitive ability and efficiency of the human brain.
The K-best decoder is part of the MIMO decoder.
Ku-Band Phased Array Tx-FE in TSMC 180nm RF
The TRV801TSM180RF IP is a Ku-Band (14GHz to 14.5GHz) Transmitter (Tx) in TSMC 180nm RF CMOS process technology.
Ku-Band Phased Array Rx-FE in TSMC 180nm RF
The TRV501TSM180RF IP is a Ku-Band (10.7GHz to 12.75GHz) Receiver (Rx) RFFE TSMC 180nm RF CMOS process technology.