Overview
NetTimeLogic’s NMEATime Of Day (ToD) Slave Clock is a full hardware (FPGA) only implementation of a synchronization core able to synchronize to a Time of Day source via NMEA over UART. The whole interface handling, message parsing, algorithms and calculations are implemented in the core, no CPU is required. This allows running NMEA synchronization completely independent and standalone from the user application. The core can be configured either by signals or by an AXI4Light-Slave Register interface. This core only adapts the second part of the clock, and does no drift or offset correction in the sub second range, this shall be done in a combination with the PPS Slave Clock.
All calculations and corrections are implemented completely in HW.
Learn more about IEEE-1588 / PTP IP core
The following sections will take a look at the major Ethernet performance issues and how the extensions address those shortcomings. This will be followed by an overview of the applications of TSN for 5G, industrial automation, automotive invehicle communications and avionics. The paper will conclude with a description of Ethernet TSN solutions offered by Comcores.
