What is Xilinx Ultra Scale NVME Host IP?
Xilinx Ultra Scale NVME Host IP is a NVMe Controller IP core from Logic Design Solutions listed on Semi IP Hub.
Vendor:
Logic Design Solutions
Category:
NVMe Controller
Xilinx Ultra Scale NVME Host IP
The LDS NVME HOST K7U IP is one of the most flexible NVME HOST IP in the market.
Overview
The LDS NVME HOST K7U IP is one of the most flexible NVME HOST IP in the market.
It has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
The register file interface simplify the management of the IP for CPU interface or State Machine interface using AXI bus:
- PCIe RP and EP register configuration is done automatically.
- NVMe register configuration is done automatically.
- Able to manage 8 Name Spaces.
- Able to manage until 16 IO Queue to fit specific user requirement. Each IO Queue is independent.
- Able to manage 512Bytes or 4096Bytes sector size.
- Able to run nearly all Admin command in parallel of IO Queue.
- Many IO command already pre-defined to ease use of the IP.
- Configurable IO Queue buffer size to fit user memory requirement in case of small density FPGA: 32KB, 64KB, 128KB or 256KB.
- Able to read all PCIe RP and EP registers.
- Easy connection to embedded Root Port PCIe IP through AXI bus.
It has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
The register file interface simplify the management of the IP for CPU interface or State Machine interface using AXI bus:
- PCIe RP and EP register configuration is done automatically.
- NVMe register configuration is done automatically.
- Able to manage 8 Name Spaces.
- Able to manage until 16 IO Queue to fit specific user requirement. Each IO Queue is independent.
- Able to manage 512Bytes or 4096Bytes sector size.
- Able to run nearly all Admin command in parallel of IO Queue.
- Many IO command already pre-defined to ease use of the IP.
- Configurable IO Queue buffer size to fit user memory requirement in case of small density FPGA: 32KB, 64KB, 128KB or 256KB.
- Able to read all PCIe RP and EP registers.
- Easy connection to embedded Root Port PCIe IP through AXI bus.
Block Diagram
NVME-HOST-RECORDER-K7U block diagram
Benefits
- The source code format is available for ease of customization. The customization can be done by Logic Design Solutions and DO254 documentation is available on request.
- This IP can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.
Applications
- Embedded recording.
What’s Included?
- Source Code
- Source Encrypted Code
Specifications
Identity
Part Number
NVME-HOST-RECORDER-K7U
Vendor
Logic Design Solutions
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
FRANCE
Frequently asked questions about NVMe Controller IP cores
How should engineers evaluate this NVMe Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NVMe Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.