Designing DDR3 SDRAM controllers with today's FPGAs
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Vendor:
Xilinx, Inc.
Category:
Video Processing
Video On-Screen Display
Important Notice: The VIPP package and its cores are in maintenance mode and not recommended for new designs.
Overview
Important Notice: The VIPP package and its cores are in maintenance mode and not recommended for new designs. For all new designs, users are recommended to use Video Mixer.
Key features
- Configurable alpha-blending layer compositor supporting up to 8 video/graphics layers
- Graphics controller generating filled and outlined transparent boxes or text
- Configurable internal text string memory with 1-bit or 2-bit per pixel color depth and scaling text by 1x, 2x, 4x or 8x
- Configurable internal font memory for 8x8 or 16x16 pixel fixed distance fonts
- Programmable layer position, size and z-plane order
- Supports RGB, RGBA, YUV-4:4:4, YUVa-4:4:4, YUV-4:2:2, YUVa-4:2:2, YUV-4:2:0, YUVA-4:2:0 (all layers must be the same color space)
- Supports 8, 10, and 12-bits per color component input and output
- Supports spatial resolutions up to 4096x4096
- Supports 1080P60 in all supported device families
Specifications
Identity
Part Number
EF-DI-OSD-SITE
Vendor
Xilinx, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about Video Processing IP
What is Video On-Screen Display?
Video On-Screen Display is a Video Processing IP core from Xilinx, Inc. listed on Semi IP Hub.
How should engineers evaluate this Video Processing?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.