Memory Trends for Automotive Markets
Priya Balasubramanian, Cadence
Vendor:
Socionext Europe GmbH
Category:
Vision Subsystem
Camera capture unit for multi-camera systems
The SEERIS Graphics Engine is a building block concept combining a collection of 2D graphics processing units with focus on blit …
Overview
The SEERIS Graphics Engine is a building block concept combining a collection of 2D graphics processing units with focus on blit operations, display control and video capture.
Key features
- Down-scaling
- De-interlacing
- Histogram measurement
- Color correction unit
- All common input capture formats supported (e.g. ITU656)
- Support for fractional ring buffer size (optimized memory layout)
Benefits
- Originally developed for automotive but used in many other applications
- Generic, flexible, silicon-proven
- Fast RTL generation using automated design flow
- Standardized interfaces and processing
- Used in Application Processors, GPUs, MCUs, Codecs and GDCs.
- Field proven : Over 10 different variants deployed in various devices in the market
Applications
- Automotive, Industrial and Consumer
What’s Included?
- Verilog RTL
- Integration Test-bench
- Documentation
- Software example drivers
- Performance uses cases
Specifications
Identity
Part Number
SEERIS Camera Capture Control
Vendor
Socionext Europe GmbH
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Germany
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Frequently asked questions about vision subsystem IP cores
What is Camera capture unit for multi-camera systems?
Camera capture unit for multi-camera systems is a Vision Subsystem IP core from Socionext Europe GmbH listed on Semi IP Hub.
How should engineers evaluate this Vision Subsystem?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Vision Subsystem IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.