Vendor: BitSim NOW Category: MIPI

Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard

The BitCsi2Rx IP is a receiver for camera sensor signals, to be used in an FPGA or ASIC.

Overview

The BitCsi2Rx IP is a receiver for camera sensor signals, to be used in an FPGA or ASIC.
It receives camera signals in accordance with the MIPI CSI-2 and D-PHY specifications. BitCsi2Rx converts these signals to parallel video signals for AXI4- Stream Video standard. To make it easier to interface BitCsi2Rx with various other design blocks, it also outputs fval (frame valid) and lval (line valid) signals for synchronization.

Third generation of the IP, so it very compact, from only 500 LUTs/FFs, including the D-PHY.

A MIPI CSI-2 transmitter IP is also available from BitSim, BitCsi2Tx.
It has been used with SoCs like: i.MX8-series (NXP), OMAP (TI), MPSoC (Xilinx), Snapdragon (Qualcomm) and Xavier (Nvidia).

Key features

  • 1 to 4 data lanes
  • Number of data lanes can be configured statically at synthesis time and dynamically during run-time
  • Supported CSI-2 Primary Data Types: like RAW8/10/12/14/16, YUV422_8/10, RGB888, Generic, User Defined
  • Up to 2.5 Gb/lane
  • Also supports Xilinx UltraScale+ with embedded D-PHY IOs
  • AXI4-Stream Video output with additional synchronization signals
  • Virtual Channel Support
  • ECC checking and correction for packet headers and short packets
  • Checksum checking for packet payload data
  • D-PHY protocol decoding included
  • Clock-lane/data-lanes deskew
  • Full High Speed/Low Power mode support ? Test/debug features
  • Written in VHDL, prepared for instantiation in Verilog or SystemVerilog design

Block Diagram

Applications

  • Automotive
  • Industrial
  • Medtech
  • Consumer
  • Vision
  • Radar etc

What’s Included?

  • Encrypted or readable source code
  • VHDL test benches and scripts
  • HW-platform/reference kit available

Specifications

Identity

Part Number
Bit-MIPI CSI-2
Vendor
BitSim NOW
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Sweden

Learn more about MIPI IP core

Prevas acquiring BitSim NOW AB

Prevas has signed an agreement for the acquisition of 100 percent of BitSim NOW AB. BitSim NOW, with its 35 employees, is a consulting firm in Stockholm that focuses on product development.

BitSim and NOW Electronics joins forces BitSim

The embedded system developers BitSim and NOW Electronics, with offices in Stockholm and Växjö, will merge their operation to form BitSim NOW with 40 employees and 15 sub-contractors.

BitSim Demonstrates an Embedded Vision Platform

To simplify the development of your own customized camera without starting from scratch, BitSim has released embedded camera blocks which contains the signal chain from camera sensor interface via MJPEG video coding to the Ethernet interface in an FPGA. An RTP Video stream over Ethernet is generated that can be displayed on, for example, a media player such as VLC.

Frequently asked questions about MIPI IP cores

What is Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard?

Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard is a MIPI IP core from BitSim NOW listed on Semi IP Hub.

How should engineers evaluate this MIPI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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