Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
10G PHY for PCIe 3.0, SS SF5 x1, North/South (vertical) poly orientation
The multi-lane Multi-Protocol 10G PHY IP is part of a high-performance multi-rate transceiver portfolio, meeting the growing need…
Multiprotocol 10G PHY, SS 8LPU x1, North/South (vertical) poly orientation
The multi-lane Multi-Protocol 10G PHY IP is part of a high-performance multi-rate transceiver portfolio, meeting the growing need…
CCIX 32G Premium Controller with AMBA bridge II
The CCIX Controller IP implements the port logic required to build a root port, endpoint, switch or dual mode device.
CCIX 32G Premium Controller II
The CCIX Controller IP implements the port logic required to build a root port, endpoint, switch or dual mode device.
112G VSR PHY, TSMC N5 x8, North/South (vertical) poly orientation
The Multi-Protocol 112G PHY IP is part of a high performance multi-rate transceiver portfolio for high-end networking and high pe…
UCIe Controller baseline for Streaming Protocols
The UCIe Controller IP encompasses the Die-to-Die Adapter Layer and Protocol Layer for widely used protocols, such as PCI Express…
The DDR5/4 PHY is a physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring hi…
112G PHY, TSMC N5 x2, North/South (vertical) poly orientation
The Multi-Protocol 112G PHY IP is part of a high performance multi-rate transceiver portfolio for high-end networking and high pe…
LPDDR5X/5/4X PHY - SS SF5A for Automotive, ASIL B Random, AEC-Q100 Grade 2
The LPDDR5X/5/4X PHY is a physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-inpackag…
LPDDR Controller ASIL B Compliant supporting LPDDR5, LPDDR4 and LPDDR4X for Automotive Applications
The LPDDR5/4/4X Controller is a next-generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC st…
LPDDR Controller ASIL B Compliant supporting LPDDR5X, LPDDR5 and LPDDR4X for Automotive Applications
The LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC s…
The HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking A…
ASIL B Ready PCIe 5.0 Integrity and Data Encryption Security Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to …
112G VSR PHY, TSMC N5 x2, North/South (vertical) poly orientation
The Multi-Protocol 112G PHY IP is part of a high performance multi-rate transceiver portfolio for high-end networking and high pe…
PCIe 5.0 PHY, SS SF5 x2, North/South (vertical) poly orientation
The multi-channel PHY IP for PCI Express® (PCIe®)5.0 and CXL includes a high-speed, high-performance transceiver to meet today’s …
Multipurpose Security Protocol Accelerator - Functional Safety ASIL B support
The Multipurpose Security Protocol Accelerator (SPAcc) offers designers unprecedented configurability to address the complex secu…
The configurable and scalable Controller IP for PCI Express® (PCIe®) 6.x supports all required features of the PCI Express 6.x sp…
VESA DSC Encoder and Decoder IP Solutions
Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-h…
CXL Controller (Spec Version 2.0 and Below)
The Synopsys Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, a…
The vendor provides designers with configurable USB4 Controller and Router IP.