Vendor:
Synopsys, Inc.
Category:
VESA DSC
VESA DSC Encoder and Decoder IP Solutions
Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-h…
Overview
Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-high-definition displays over HDMI 2.1, MIPI DSI, and VESA DisplayPort links. The IP enables designers to incorporate visually lossless data compression between the SoC and display to maximize video bandwidth and optimize power, and area for mobile, automotive, and AR/VR applications. Synopsys VESA DSC IP, consisting of encoder and decoder, is compliant with the latest VESA DSC 1.2a and 1.1 specifications.
Synopsys MIPI DSI Host Controller IP with VESA DSC encoder together with Synopsys MIPI D-PHY and C-PHY/D-PHY IP provide a complete, interoperable display solution, enabling designers to lower their risk and cost of integrating the IP into application processors, display bridge integrated circuits (ICs) and multimedia coprocessors.
Synopsys MIPI DSI Host Controller IP with VESA DSC encoder together with Synopsys MIPI D-PHY and C-PHY/D-PHY IP provide a complete, interoperable display solution, enabling designers to lower their risk and cost of integrating the IP into application processors, display bridge integrated circuits (ICs) and multimedia coprocessors.
Benefits
- Compliant with the VESA DSC 1.2a and 1.1 specifications
- Supports all DSC video formats: RGB, YCbCr, native 4:2:2/4:2:0, simple 4:2:2
- Supports the latest interface standards: HDMI 2.1, MIPI DSI, DisplayPort
- Configurable IP delivers low-power and small area
- Multiple slice decoding: 1, 2, 4, 8, 12, 16
- Precision: 8, 10, 12, 14, 16 bits
- Selection of coding schemes (MMAP, BP, MPP, ICH)
- Single port RAM-based buffers
- Picture Parameter Set (PPS)
- Highly programmable with APB-3 based
- register interface
- Error reporting for robust auto-recovery
Specifications
Identity
Part Number
dwc_vesa_dsc_encoder_decoder_solutions
Vendor
Synopsys, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
Learn more about VESA DSC IP core
Saving Power in Displays for Mobile and Consumer Electronics Applications
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The integration of VESA Display Stream Compression (DSC) and MIPI Display Serial Interface (DSI) in a System-on-Chip (SoC) offers significant benefits for high-resolution display systems. This whitepaper discusses the challenges involved in integrating these technologies and provides insights into overcoming them.
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VESA Video Compression on MIPI DSI-2 Enables Next-Generation Display Applications
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Rethinking Display Safety: Why RISC-V-Supervised DisplayPort Subsystems Enable Secure, Isolated Automotive Architectures
As automotive displays become part of the safety surface, traditional host-dependent display architectures are showing their limits. In this article, Trilinear outlines how a RISC-V supervised DisplayPort subsystem can provide isolated control, deterministic fault handling, and a more auditable architecture for advanced automotive display platforms.
Frequently asked questions about VESA DSC IP cores
What is VESA DSC Encoder and Decoder IP Solutions?
VESA DSC Encoder and Decoder IP Solutions is a VESA DSC IP core from Synopsys, Inc. listed on Semi IP Hub.
How should engineers evaluate this VESA DSC?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this VESA DSC IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.