Overview
Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-high-definition displays over HDMI 2.1, MIPI DSI, and VESA DisplayPort links. The IP enables designers to incorporate visually lossless data compression between the SoC and display to maximize video bandwidth and optimize power, and area for mobile, automotive, and AR/VR applications. Synopsys VESA DSC IP, consisting of encoder and decoder, is compliant with the latest VESA DSC 1.2a and 1.1 specifications.
Synopsys MIPI DSI Host Controller IP with VESA DSC encoder together with Synopsys MIPI D-PHY and C-PHY/D-PHY IP provide a complete, interoperable display solution, enabling designers to lower their risk and cost of integrating the IP into application processors, display bridge integrated circuits (ICs) and multimedia coprocessors.
Learn more about VESA DSC IP core
Recognition highlights leadership in agentic AI design, advanced-node enablement, co-packaged optics, and silicon-proven IP for next-generation AI systems
Leading portfolio of engineering solutions positions Synopsys to capitalize on the continued expansion of digital and physical AI and the AI-driven transformation of engineering.
The companies signed an expansive, multi-year agreement to jointly develop GPT-Synopsys, a specialized model, optimized to use Synopsys EDA tools to perform semiconductor design workflows.
The multi-year agreement marks the expansion of Synopsys' silicon IP business to serve increasing demand for application-optimized IP with Amazon as its lead customer.
Open and Secure Synopsys Autopilot Platform Accelerates Engineering Productivity, Improves Design Quality, and Achieves Faster Closure Across Silicon to Systems
New collaborations span A14 design enablement, AI-assisted engineering workflows, CoWoS® support for multi-die designs, and unified multiphysics signoff
