Oregano Systems offers design and consulting services in the area of integrated circuits and systems with special emphasis on digital ASIC and FPGA design.
Our main focus is designing industrial electronic systems. Additionally we offer EDA training services.
As a result of our research work we develop IP cores suited especially for FPGA design.
syn1588® enabled IEEE 1588 compliant clock synchronisation
The syn1588® Clock_M IP core offers the full syn1588® technology with a suitable number of trigger and IO events supported.
The 8051 IP Core was developed in cooperation with the Arbeitsgruppe CAD / TU-Wien.
ADPCM (Adaptive Differential Pulse Code Modulation) is used for speech compression of 64 kbit/s PCM data.