Vendor: Oregano Systems Category: Data Compression

Parametrizeable ADPCM IP Core

ADPCM (Adaptive Differential Pulse Code Modulation) is used for speech compression of 64 kbit/s PCM data.

Overview

ADPCM (Adaptive Differential Pulse Code Modulation) is used for speech compression of 64 kbit/s PCM data. The ADPCM algorithm is standardized as ITU standard G.721 and G.726. Fields of application range from classical voice based telecommunication (POTS) to industrial speech storage or speech output systems. The advantage of ADPCM is the compareable small computation effort required while delivering very good speech quality.

Our parametrizeable ADPCM IP core is technology independent and may thus be used for FPGA as well as for ASIC designs. The ADPCM IP core is parametrizeable in the number of channels to be processed. The format of the PCM signal may be defined either on a per channel basis or globally. For reducing the complexity one may skip to synchronous coding adjustment unit. This is useful for many industrial and consumer solutions.

Key features

  • completely compatible to ITU standard G.726
  • ITU standard G.727 solution available on demand
  • selectable bit rate of 16/24/32/40 kbit/s per channel
  • parametrizeable number of channels
  • law coded or linear PCM selectable per channel
  • each channel may be used either as encoder or decoder
  • technology independent design
  • designed for usage with all popular FPGA-families from Altera and Xilinx
    • e.g. 64 channels Altera APEX-E (EP20K200EBC356-1): 3253 LEs and 11 ESBs
  • serial and parallel interfaces available
  • every interface avilable on demand
  • single clock signal, fully synchronous circuit

Specifications

Identity

Part Number
ADPCM IP Core
Vendor
Oregano Systems
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Austria

Learn more about Data Compression IP core

Evaluating Lossless Data Compression Algorithms and Cores

Data compression plays a critical role in modern computing, enabling efficient storage and faster transmission of information. Among lossless data compression algorithms, GZIP, ZSTD, LZ4, and Snappy have emerged as prominent contenders, each offering unique trade-offs in terms of compression ratio, speed, and resource utilization. This white paper evaluates these algorithms and their corresponding hardware cores, providing an in-depth comparison to help developers and system architects choose the optimal solution for their specific use case.

Firmware Compression for Lower Energy and Faster Boot in IoT Devices

The phrase “IoT” for Internet of Things has exploded to cover a wide range of different applications and diverse devices with very different requirements. Most observers, however, would agree that low energy consumption is a key element for IoT, as many of these devices must run on batteries or harvest energy from the environment.

IP Core for an H.264 Decoder SoC

This paper presents the development of an IP core for an H.264 decoder. This state-of-the-art video compression standard contributes to reduce the huge demand for bandwidth and storage of multimedia applications. The IP is CoreConnect compliant and implements the modules with high performance constraints.

Frequently asked questions about Data Compression IP

What is Parametrizeable ADPCM IP Core?

Parametrizeable ADPCM IP Core is a Data Compression IP core from Oregano Systems listed on Semi IP Hub.

How should engineers evaluate this Data Compression?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Data Compression IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP