Crypto Box Toolset Secure Accelerator
Compact Crypto Box IP Core for Resource-Constrained Devices FortifyIQ’s Crypto Box IP core is a compact, power-efficient cryptogr…
- Security Coprocessor
FortifyIQ develops HW security IP cores fortified against Side-Channel (SCA) and Fault Injection attacks (FIA), while preserving the original AES goals of speed, low latency, and low power usage. We also offer high-performance software libraries and EDA tools for pre- and post-silicon security assessment.
Our core protection algorithm was tested rigorously, passing the Test Vector Leakage Assessment (TVLA) test at 1 billion traces, and was certified by a third-party Common Criteria lab. Our cores are fully synthesizable, eliminating the need for custom cells or special place & route handling. Being algorithm-based, they are technology-agnostic, ensuring compatibility and security across diverse platforms and devices.
Secure IP Cores and SW libraries
FortiCrypt: Our Advanced AES IP cores provide robust protection against SCA, FIA, (including Differential Power Analysis-DPA, and Statistically Ineffective Fault Attacks-SIFA), alongside high performance, low latency, low gate count, and low power usage. Purely mathematically-driven, these cores achieve a high maximum frequency, and one clock cycle per AES round.
Our FortiCrypt high-performance software library can be used to protect security vulnerabilities in HW in unprotected field devices even though they are already deployed, by a simple software download. They are based on the same security proven algorithm (STORM) as our ultra-low power IP cores, and are silicon proven. They have extremely high performance. Even on a low-end 1.1 GHz ARM processor the performance is high enough for Ultra HD (3840×2160) video streaming.
FortiMac: These HMAC SHA2 cores provide robust protection against SCA, DPA, FIA, and SIFA, are suitable for lightweight applications and are purely algorithmic and thus implementation-agnostic. Our products, including the software library, offer protection of HMAC SHA2, based on the threshold implementation approach, validated analytically and on physical devices.
FortiPKA-RISC-V: A Public Key Algorithm coprocessor with modular multiplication and SCA and FIA protection that streamlines operations by eliminating Montgomery domain transformations, enhancing the coprocessor's performance and reducing area.
FortiPKEx: A low-cost key exchanger for companies currently using preinstalled symmetric keys due to cost constraints, but are considering shifting to key exchange protocols based on asymmetric cryptography with built-in resistance to SCA and FIA.
EDA Tools:
Comprehensive pre-silicon and post-silicon security assessment tools, including TVLA charts that pinpoint vulnerabilities down to specific modules and gates, greatly simplifying security debugging against a spectrum of physical attacks, including SCA, DPA, FIA, and SIFA. This effectively moves the security assessment to the same stage as the functional assessment. These tools were instrumental in developing all our secure IP cores and software libraries.
Crypto Box Toolset Secure Accelerator
Compact Crypto Box IP Core for Resource-Constrained Devices FortifyIQ’s Crypto Box IP core is a compact, power-efficient cryptogr…
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
Compact and Secure Post-Quantum Key Encapsulation SW Library for Resource-Constrained Devices As classical asymmetric encryption …
High-Performance Hybrid Classical and Post-Quantum Cryptography
Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security FortifyIQ’s High-Performance Hybrid Cryptography…
Hybrid Classical and Post-Quantum Cryptography
Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security FortifyIQ’s Hybrid Cryptography IP core combines…
Versatile Post-Quantum Cryptography IP Core for Balanced Performance, Area, and Power FortifyIQ’s Post-Quantum Cryptography IP co…
Compact and Secure Post-Quantum Signature IP Core for Resource-Constrained Devices As digital signature algorithms face obsolesce…
Compact and Secure Post-Quantum ML-KEM IP Core for Resource-Constrained Devices As quantum computing threatens traditional public…
Secure RoT Core for Data Centers
Secure RoT with Post-Quantum Cryptography Datacenter-class SoCs such as CPUs, GPUs, DPUs, and NVMe controllers require a trusted …
AES-SX Secure Core - High-Performance AES Encryption/Decryption Core with Advanced SCA/FI Protection
High-Performance AES Encryption/Decryption Core with SCA/FI Protection FortifyIQ’s High-Performance AES IP core delivers fast, se…
Compact AES Encryption Core with Robust SCA/FI Protection for Constrained Devices FortifyIQ’s Compact AES IP core is an ultra-lig…
AES-SX Secure Core - Balanced AES Core with Multi-Mode Support and Advanced SCA/FI Protection
Balanced AES Core with Multi-Mode Support and SCA/FI Protection FortifyIQ’s Balanced AES IP core is a compact yet capable cryptog…
High-Performance SHA-2/HMAC Accelerator with Full SHA-2 Family Support and Low Latency SCA/FI Protection FortifyIQ’s SHA-2/HMAC I…
HMAC-SHA256 Secure Core - Hardware Accelerator for SHA-2 and HMAC with Low Latency SCA/FI Protection
Hardware Accelerator for SHA-2 and HMAC with Low Latency SCA/FI Protection FortifyIQ’s SHA-2/HMAC IP core delivers high-speed, ha…
High-Performance AES Encryption Core with GCM/XTS Support and SCA/FI Protection FortifyIQ’s High-Performance AES Encryption Core …
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
Advanced DPA- and FIA-Resistant Software Library
The AES-SW library delivers high-performance protection against side-channel (SCA) and fault injection attacks (FIA) through OTA …