Faraday Technology Corporation is a leading fabless ASIC and silicon IP provider. The company's broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDRI/II/III, MPEG4, H.264, USB 2.0/3.0, 10/100 Ethernet, Serial ATA, and PCI Express, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. Faraday is listed in Taipei Stock Exchange, ticker 3035.
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/HVT Logic Process 9-track Standard cell ECO_M1 CORE library (C38)
UMC 28nm HPM/HVT Logic Process 9-track Standard cell ECO_M1 CORE library (C38)
UMC 28nm HPM/HVT Logic Process 9-track Standard ECO_M1 cell library (C35)
UMC 28nm HPM/HVT Logic Process 9-track Standard ECO_M1 cell library (C35)
UMC 55nm ULP/uHVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias.
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90). W/O deep Nwell.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90).
UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library
UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)