Phase Locked Loop (PLL) Frequency Synthesizer Core
For general purpose Phase Locked Loops (PLL), ASIC designers have to rely on analog VCOs until today.
- PLL
- Available
Under the name "C3IP" (Cologne Chip IP Cores), Cologne Chip offers innovative ASIC IP Cores. The product line consits of PLLs and CODECs (DAC/ADC) based on a completely new design technology: DIGICC Technology. DIGICC-based IP Cores replace analog functions by fully digital macros.
Being successful in ASIC design as semiconductor manufacturer, the experience of Cologne Chip's R&D team in digital engineering has led to an in-depth know-how especially in the field of telecommunication interfaces.
Phase Locked Loop (PLL) Frequency Synthesizer Core
For general purpose Phase Locked Loops (PLL), ASIC designers have to rely on analog VCOs until today.
Quad Voice CODEC compliant to ITU-T G.712
Cologne Chip’s IP core C3-CODEC-G712-4 consists of four voice CODECs for telephony applications in compliance with ITU-T recommen…