Vendor: VEGA Semiconductor Category: Single-Protocol PHY

USB 2.0 PHY

The IP is a USB PHY based on TSMC 180nm process.

USB 2.0 TSMC 180nm BCDG2 Available on request View all specifications

Overview

The IP is a USB PHY based on TSMC 180nm process.

Key features

  • Process: TSMC 180nm 1.8v/3.3v 1P6M process
  • SNR: 96dB@1.8V for 48kHz
  • DR: 95dB@1.8V for 48kHz
  • Digital HPF for DC-Offset cancel
  • Power Supply: Analog power supply 2.6V ~ 3V ~3.6V
  • Digital power supply 1.08V~ 1.2V ~ 1.32V
  • Operated Ambient Temperature: Ta = -40 ~ 85°C
  • Operated Junction Temperature: Tj = -40~125°C

Block Diagram

Silicon Options

Foundry Node Process Maturity
TSMC 180nm BCDG2 Available on request

Specifications

Identity

Part Number
USB PHY_V0.0.1
Vendor
VEGA Semiconductor
Type
Silicon IP

Standards & Interfaces

Supported Standards
USB 2.0

Provider

Frequently asked questions about Single-Protocol PHY IP

What is USB 2.0 PHY?

USB 2.0 PHY is a Single-Protocol PHY IP core from VEGA Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Available on request.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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