High-Speed Test IO: Addressing High-Performance Data Transmission And Testing Needs For HPC & AI
Maximize limited package pins with IO that can act as high-speed test ports then be reused as low-power GPIOs during field operation.
Vendor:
Synopsys, Inc.
Category:
GPIO
TSMC N5A 1.2V/1.8V I3C AG2 Platform
Synopsys I3C IO library supports a simplified system of connecting and managing multiple sensors in a device.
Overview
Synopsys I3C IO library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can be controlled by one I3C primary device at a time. It offers backward compatibility with I2C legacy devices, is designed for high IO voltage domains and supports low-core voltage domains. The I3C incorporates the Schmitt-Trigger function, supports I2C Legacy Fast Mode and FM+ Mode, and includes HBM and CDM ESD protection. We provide an interoperable validated I3C IO solution with our in-house Synopsys I3C controllers. The library supports independent power sequencing with the support of a power management cell from our base libraries. The Synopsys I3C IO specifications align with the latest JEDEC standards and support:
* Push-pull (12.5 MHz) and Open drain I3C modes (1MHz)
* I2C Legacy Fast Mode (400KHz) and Fm+(1MHz) Mode
Key features
- Support Schmitt trigger
- 50 ns filter for spike rejection
- Automotive G1/G2 supported, ASIL-B certified
- Silicon-validated IP
- Interoperable validated I3C IO solution with our in-house Synopsys I3C Controllers
- HBM 2KV, CDM 500V(up to 7A), Latch-up: +/-100mA @ 125ºC
- Designed to support multiple metal stack options
- Support for flip-chip & wire bond packaging
- Silicon-proven solution
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 5nm | N5A | — |
Specifications
Identity
Part Number
dwc_io_ts5ffauto_af_1p8v1p2v_i3c_ag2
Vendor
Synopsys, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about GPIO Pad Library IP cores
What is TSMC N5A 1.2V/1.8V I3C AG2 Platform?
TSMC N5A 1.2V/1.8V I3C AG2 Platform is a GPIO IP core from Synopsys, Inc. listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this GPIO?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.