Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: PLL

SMIC0.18um PLL

This PLL is designed for audio clock generation.

SMIC 180nm G View all specifications

Overview

This PLL is designed for audio clock generation. The reference clock is 12MHz crystal or the input clock. It supports 256*fs clock output, where fs is the audio system sample rate of 32kHz/44.1kHz/48kHz. It integrates a phase frequency detector (PFD), a loop filter (LP), a voltage control oscillator (VCO), a current reference, two programmable dividers and other supportive circuits.

Key features

  • Process: SMIC 0.18um 1P4M mixed-signal process with MIM capacitor
  • Supply Voltage: 3.3v+/-10%; 1.8v+/-10%
  • Reference Input: 12MHz crystal or external clock
  • Clock Output: 12.286MHz, 11.294MHz, 8.190MHz, 6.143MHz, 5.647MHz, 4.095MHz, 3.071MHz, 2.823MHz, 2.048MHz
  • Output Duty Cycle: 49~51% Current: <1.5mA
  • Operating Temperature: 0~85°C
  • More details, pleas go to below website to contact VeriSilicon location sales:http://www.verisilicon.com/en/contactus.asp

Silicon Options

Foundry Node Process Maturity
SMIC 180nm G —

Specifications

Identity

Part Number
SMIC18_PLL_05
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Learn more about PLL IP core

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Frequently asked questions about PLL IP cores

What is SMIC0.18um PLL?

SMIC0.18um PLL is a PLL IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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