Vendor: SMIC Category: Analog

SMIC 65nm LL Standard digital and oscillator IO

SMIC 65nm LL In Production View all specifications

Key features

  • Standard digital and oscillator IO;
  • Cell Size (Width * height) 30um * 228um with DUP stagger bonding pads;
  • Work voltage: 2.5V power with 3.3V input tolerance; 3.3V power with 5V input tolerance;
  • SMIC 0.065?m Logic Salicide 1.2V/2.5V low leakage Process;
  • Suitable for 6, 7, 8 and 9 layers application (single top metal);
  • Suitable for 6,7, 8, 9 and 10 layers application (double top metal);

Silicon Options

Foundry Node Process Maturity
SMIC 65nm LL In Production

Specifications

Identity

Part Number
SP65NLLD2P_3P3V
Vendor
SMIC
Type
Silicon IP

Provider

HQ: China

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Frequently asked questions about Analog I/O Pad Library IP cores

What is SMIC 65nm LL Standard digital and oscillator IO?

SMIC 65nm LL Standard digital and oscillator IO is a Analog IP core from SMIC listed on Semi IP Hub. It is listed with support for smic In Production.

How should engineers evaluate this Analog?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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