Vendor: SMIC Category: Analog

SMIC 55nm LL Standard analog IO

SMIC 55nm LL In Production View all specifications

Key features

  • Standard analog IO;
  • Cell Size (Width * height) 50um * 123um;
  • Work voltage: 1.2V or 3.3V analog input/output;
  • SMIC 55nm Logic Salicide 1.2/1.8/2.5/3.3V Low Leakage Process and SMIC 55nm Mixed Signal and RF Salicide 1.2V/2.5V low leakage Process;
  • Suitable for 7, 8 and 9 layers application (single top metal);
  • Suitable for 7, 8, 9 and 10 layers application (double top metal);

Silicon Options

Foundry Node Process Maturity
SMIC 55nm LL In Production

Specifications

Identity

Part Number
SP55NLLD2RP_OV3_ANALOG
Vendor
SMIC
Type
Silicon IP

Provider

HQ: China

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Frequently asked questions about Analog I/O Pad Library IP cores

What is SMIC 55nm LL Standard analog IO?

SMIC 55nm LL Standard analog IO is a Analog IP core from SMIC listed on Semi IP Hub. It is listed with support for smic In Production.

How should engineers evaluate this Analog?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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