High-Performance Hybrid Classical and Post-Quantum Cryptography
Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security FortifyIQ’s High-Performance Hybrid Cryptography…
- Post Quantum
Cryptography IP cores provide hardware-based security functions for protecting data, communications, and digital assets in modern SoC and ASIC designs. By offloading cryptographic operations from software, these IP cores deliver higher performance, lower latency, improved energy efficiency, and stronger resistance to security attacks.
This category includes Symmetric Cryptography, Public Key Cryptography, Post-Quantum Cryptography (PQC), Hash / MAC, and Random Number Generator (RNG) IP solutions. Available implementations may support algorithms such as AES, ChaCha20, RSA, ECC, ML-KEM, ML-DSA, SHA-2, SHA-3, HMAC, CMAC, and true or deterministic random number generation technologies required for secure key management and authentication.
This catalog enables semiconductor engineers to evaluate and compare Cryptography IP from leading vendors based on supported algorithms, security certifications, throughput, latency, power consumption, silicon area, side-channel resistance, quantum-safe capabilities, and semiconductor process node compatibility.
High-Performance Hybrid Classical and Post-Quantum Cryptography
Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security FortifyIQ’s High-Performance Hybrid Cryptography…
Hybrid Classical and Post-Quantum Cryptography
Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security FortifyIQ’s Hybrid Cryptography IP core combines…
Versatile Post-Quantum Cryptography IP Core for Balanced Performance, Area, and Power FortifyIQ’s Post-Quantum Cryptography IP co…
Lightweight, Scalable Cryptographic Accelerators for Secure SoC Designs The Cryptographic Cores IP portfolio delivers secure, hig…
Kyber IP is a core designed for Kyber post-quantum Key Encapsulation Mechanism (KEM).
eSi-Kyber is a hardware accelerator core designed to accelerate post-quantum Key Encapsulation Mechanism (KEM) as defined by NIST…
Highly configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems
configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems – from Core to Multi-instance Manager with Queuing or Strea…
Single instance HW Lattice PQC ultra accelerator
Single instance HW Lattice PQC ultra accelerator as an AXI subordinate PQPerform-Flare is a hardware-based FIPS 140-3 CAVP-certif…