Vendor: Synopsys, Inc. Category: Symmetric Crypto

Pipelined AES-GCM/CTR Core

The compact, High-Performance AES-GCM/CTR IP implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand…

Overview

The compact, High-Performance AES-GCM/CTR IP implements the AES-GCM/CTR algorithm as specified in the National Institute of Standards and Technology (NIST) Special Publication 800-38D, “Recommendation for Block Cipher Modes of Operation: Galois/Counter Mode (GCM) and GMAC.” AES-GCM/CTR is the algorithm of choice for high-performance cryptographic systems. It uses the Advanced Encryption Standard (AES) algorithm in counter mode (CTR) and a high-performance MAC algorithm based on Galois Field multiplication with CTR mode encryption, which can be pipelined for high throughput operations.

The implementation of a secure communications design requires the ability to do both cipher operations and message authentication. The AES algorithm in CTR can be pipelined and is capable of performing hardware encryption and decryption at high speed.

For message authentication, the GCM makes use of binary Galois Field multiplications that can be computed in parallel with the encrypt/decrypt operations, permitting higher throughput than chaining-based authentication algorithms.

The high-performance AES-GCM/CTR algorithm is well suited to high-performance applications because it:

Reaches throughput of up to 100 Gbps (contact the vendor for higher throughput solutions)

Is rendered efficiently in hardware

Offers universal message authentication for incremental authentication of packet header information that can’t be encrypted

The High-Performance AES-GCM/CTR IP is a high throughput in-line cryptographic engine that implements the AES-GCM cipher, which is, for example, the mandatory cipher in IEEE 802.1AE (MACsec – Ethernet link security) standard and a mandatory cipher in the TLS 1.3 (IETF RFC 8446, Transport Layer Security version 1.3) standard. AES-GCM/CTR is an optional cipher in IPsec with all three key sizes specified, i.e. 128-, 192-, and 256-bit keys. It is also used in other applications, such as tape storage and secure shell protocols.

As part of the vendor’s Security IP portfolio, the silicon-proven High-Performance AES-GCM/CTR IP core is a flow-through, scalable design allowing for context switching between multiple data streams and configures to support a wide performance range.

Key features

  • Scalable architecture configurable from 18 to 128 bits/cycle (up to 128Gbps @ 1GHz)
  • Flow-through design
  • Interleaved capabilities on any number of contexts
  • Stall mitigation when context switching
  • Supports 128-, 192- and 256-bit keys GCM and GMAC modes
  • Scalable context switch rate 96-bit IV support with no external logic
  • Flow-through AAD option as a configuration parameter
  • Internal generation of hash key

Specifications

Identity

Part Number
dwc_high_perf_aes_gcmctr
Vendor
Synopsys, Inc.
Type
Silicon IP

Security

Crypto Algorithm
AES

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Symmetric Crypto IP core

Right-Sizing Your Cryptographic Processing Solution

In this white paper we investigate different cryptography implementation options and trade-offs, describe the measurable parameters, and analyze examples. We introduce and use the new EEMBC SecureMark™ benchmark for these measurements

Frequently asked questions about Symmetric Cryptography IP cores

What is Pipelined AES-GCM/CTR Core?

Pipelined AES-GCM/CTR Core is a Symmetric Crypto IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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