Vendor: IntelliProp Inc. Category: NVMe Controller

NVMe Target IP Core

The IntelliProp IPC-NV163A-DT NVMe Target IP core allows companies to build high speed NVMe based storage products.

Overview

The IntelliProp IPC-NV163A-DT NVMe Target IP core allows companies to build high speed NVMe based storage products. The IPC-NV163A-DT provides a hardware accelerated queue management interface for NVMe commands and completions as well as provides the NVMe controller register interface for host communication and controller management.

The IPC-NV163A-DT is designed to be integrated into an NVMe-compliant device application. The NVMe Target IP core manages multi-queue command fetching and completion posting via an internal controller register interface. Multi-queue command fetching is automated by state-machines internal to the IP core. As commands are fetched from host memory, the commands are filtered by type and provided to the controller application software via a simple context FIFO interface. As the controller application software completes command processing, the controller application software can complete the command via a simple completion context interface in the IP core. Once a completion context push is made to the IP core completion FIFO, the IP core internal state-machines automate the NVMe completion queue context transfer and update all pointer and phase information without software intervention. This automated command fetching and completion posting interface provides very low latency interface to the controller application software which is required for maximum IOPs and data bandwidth.

Key features

  • Fully compliant to the NVM Express 1.3d industry specification
  • Compliant with 3rd party PCIe Target IP cores
  • Application layer (command based) interface with Processor interface
  • Data Interface through FIFOs
  • Processor interface for register access
  • Command interrupts for user processing system
  • Synthesis time maximum queue depths of up to 64k supported
  • Supports up to 255 queues
  • Automated PCIe interrupt generation on posting of completions
  • Synchronous design for easy integration

Applications

  • NVMe SSD Controllers
  • NVMe fabric devices
  • NVMe Bridge Systems

Specifications

Identity

Part Number
IPC-NV163A-DT
Vendor
IntelliProp Inc.
Type
Silicon IP

Files

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Provider

Learn more about NVMe Controller IP core

NVMe powers SSDs in the enterprise

With the emergence of non-volatile memory express (NVMe), a scalable host controller interface specifically developed for PCIe SSDs, and a supporting ecosystem plus dedicated devices such as NVMe programmable flash controller chips, the potential of PCIe SSDs for enterprise computing applications can be fully realized.

Controller Memory Buffer (CMB): NVMe 2.0โ€™s On-Controller Memory Feature

Non-volatile Memory Express (NVMe) has become the dominant interface protocol for high-performance storage devices. As workloads demand ever-lower latencies, the NVMe specification has evolved with features that reduce data-path overhead. One such feature is the Controller Memory Buffer (CMB), which exposes on-controller memory directly to the host system.

NVMe host IP for computing accelerator

NVM Express (NVMe) SSDs are well adopted by the storage industry. It delivers high performances in term of IOPS, throughput and latency. It comes with a various range of capacity and form factors including PCIe Add-In-Card, 2.5" U.2, M.2 and recently as a single BGA chip.

Frequently asked questions about NVMe Controller IP cores

What is NVMe Target IP Core?

NVMe Target IP Core is a NVMe Controller IP core from IntelliProp Inc. listed on Semi IP Hub.

How should engineers evaluate this NVMe Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NVMe Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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