Overview
Implemented in approximately 50,000 gates, the AVQ3000 is a silicon-efficient, high-quality solution for video decoding, noise reduction and video compression pre-processing. Using Adaptive 3D Comb Filter technology, the AVQ3000 clean roughly decoded NTSC/PAL composite Video using 10-bit YUV 4:2:2 format. Requires one or two external frame buffers. The design is highly robust and unlike other similar filters works reliably on noisy signals. AVQ3000 is proven in Virtex-4 FPGA. Evaluation board available.
Learn more about Video Processing IP core
This paper describes an FPGA-based high-definition video processing platform. The platform supports a wide range of applications including flat-panel TV, projection TV and video monitor.
Configurable Processors for Video Processing SOCs
Programmable FPGA devices are the perfect choice for interfacing with multiple high-resolution image sensors simultaneously...
A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing
Building a high-performance, quad-channel H.264 encoder using low-cost, low-power FPGA architecture.
Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.
