The MPEG-1/2+AAC Audio Decoder (CWda99) is an audio IP core for decoding up to 6 audio channels in real-time.
The MPEG-1/2+AAC Audio Decoder (CWda99) is an audio IP core for decoding up to 6 audio channels in real-time.
This core contains the MPEG + AAC decoder software and the Coreworks processor based hardware audio engine platform (CWda3111).
The software is compiled into an image file (.bin) which can be automatically boot-loaded through one of the control interfaces (parallel AMBA APB or serial SPI) and run on the audio engine platform with simple parameters setting.
The program can be configured, controlled and monitored by means of a configuration, control, and status register file, accessed by the control interfaces.
The audio input and output interfaces uses a native parallel interface. Other standard audio interfaces, such as I2S/TDM and SPDIF are also available.
The interface to the external memory can be one of the following: AMBA AXI (for ASICs or Xilinx FPGAs), Avalon (for Altera FPGAs) or MIG (for Xilinx FPGAs).
The CWda3111 platform is an instance of the generic CWdaXYZ Audio Engine Platform. Other platforms are available for a different number of audio channels (from 2 channels, up to 32 channels). Please contact us to select the best solution for your requirements.
Specifications
Interfaces
Note: some files may require an NDA depending on provider policy.
MPEG-1/2 + AAC Audio Decoder is a Audio Analog IP core from Coreworks, S.A. listed on Semi IP Hub.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Audio Analog IP.
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