Arm welcomes favorable jury verdict in Qualcomm litigation
We are pleased with the jury’s decision today finding for Arm on four claims and awarding only one dollar in damages on each of Qualcomm’s other two claims.
Vendor:
Arm Ltd.
Category:
Edge AI Accelerator
ML Inference Processor with Balanced Efficiency and Performance
Optimized for the most cost- and power-sensitive designs, Ethos-N57 delivers premium AI experiences in mainstream phones and digi…
Overview
Optimized for the most cost- and power-sensitive designs, Ethos-N57 delivers premium AI experiences in mainstream phones and digital TVs. The Arm AI platform makes it easy to develop on Arm by combining the highest performance, open-source software framework with the largest AI ecosystem.
Key features
- Balanced Performance
- Delivers up to 2 TOP/s of performance with 1024 8-Bit MACs.
- Optimized Design
- Up to 225% convolution performance uplift using Winograd on 3x3 kernels, delivering up to 90% MAC utilization.
- High Efficiency
- Internally distributed SRAM stores data close to the compute elements to save power and reduce DRAM access.
- Futureproof
- Supports a wide range of existing ML operations and future innovations through firmware updates and compiler technology.
Specifications
Identity
Part Number
Ethos-N57
Vendor
Arm Ltd.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Great Britain
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Frequently asked questions about Edge AI Accelerator IP cores
What is ML Inference Processor with Balanced Efficiency and Performance?
ML Inference Processor with Balanced Efficiency and Performance is a Edge AI Accelerator IP core from Arm Ltd. listed on Semi IP Hub.
How should engineers evaluate this Edge AI Accelerator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Edge AI Accelerator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.