Vendor: SmartDV Technologies Category: Protocol Bridge

MIPI I3C Slave To AHB Bridge IIP

MIPI I3C Slave To AHB Bridge interface provides full support for the two-wire MIPI I3C synchronous serial interface, compatible w…

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Overview

MIPI I3C Slave To AHB Bridge interface provides full support for the two-wire MIPI I3C synchronous serial interface, compatible with MIPI I3C specification version 2.0. Through its MIPI I3C compatibility, it provides a simple interface to a wide range of low-cost devices. MIPI I3C Slave To AHB Bridge IIP is proven in FPGA environment.The host interface of the MIPI I3C can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.

MIPI I3C Slave To AHB Bridge IIP is supported natively in Verilog and VHDL

Key features

  • Compliant with MIPI I3C version 2.0 specification.
  • Full MIPI I3C Slave functionality.
  • Converts MIPI I3C Transactions into AHB write or read instructions
  • Allows external devices to access the internal AHB Bus
  • Useful for updating device software from and external device
  • Useful for reading internal memory mapped registers and memory
  • Supports Mailbox Read/Write functionality
  • Supports AHB Master Read/ Write capability
  • Supports AHB Slave
  • Supports monitoring of erroneous AHB transfers and reports error to the system
  • Two wire serial interface up to 12.5 MHz using Push-Pull with the following Data rates supported.
    • Standard speed
  • Supports the following topologies
    • Single Master-Multi Slave
    • Single Master-Single Slave
  • I2C legacy device support
  • Supports Single Data Rate (SDR) messaging.
    • SDR with CCC Directed addressing
    • SDR with CCC Broadcasted addressing
  • Supports High Data Rate (HDR) messaging
    • HDR-Dual Data Rate Mode (HDR-DDR)
  • In-Band Interrupt support
  • Hot-Join support
  • Dynamic Address Assignment support (DAA).
  • Fully synthesizable.
  • Static synchronous design.
  • Positive edge clocking and no internal tri-states.
  • Scan test ready.
  • Simple interface allows easy connection to microprocessor/microcontroller devices.

Block Diagram

MIPI I3C Slave To AHB Bridge IIP block diagram

Benefits

  • Single Site license option is provided to companies designing in a single site.
  • Multi Sites license option is provided to companies designing in multiple sites.
  • Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
  • Unlimited Designs,license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.

What’s Included?

  • The MIPI I3C SLAVE To AHB Bridge interface is available in Source and netlist products.
  • The Source product is delivered in verilog. If needed VHDL, SystemC code can also be provided.
  • Easy to use Verilog Test Environment with Verilog Testcases
  • Lint, CDC, Synthesis, Simulation Scripts with waiver files
  • IP-XACT RDL generated address map
  • Firmware code and Linux driver package
  • Documentation contains User's Guide and Release notes.

Specifications

Identity

Part Number
MIPI I3C Slave To AHB Bridge IIP
Vendor
SmartDV Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact SmartDV Technologies

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Frequently asked questions about Protocol Bridge IP cores

What is MIPI I3C Slave To AHB Bridge IIP?

MIPI I3C Slave To AHB Bridge IIP is a Protocol Bridge IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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