IP Accelerated (Bye Bye EDA 360)
Eric Esteve
Vendor:
Silicon Library Inc.
Category:
MIPI PHY
MIPI DPHY TX IP in TSMC 130
This MIPI DPHY Tx PHY IP is designed to the MIPI D-PHY 1.2 specifications.
Overview
This MIPI DPHY Tx PHY IP is designed to the MIPI D-PHY 1.2 specifications. This IP supports up to 1.5Gbps. This IP includes two PLLs.
Key features
- MIPI D-PHY ver.1.2 compliant Tx IP
- -Supports HS mode (from 80Mbps to 1.5Gbps) and LS mode (up to 10Mbps)
- -4-data/1-clock configuration
- -8:1 serializer and PLL for HS interface
- -Configurable analog characteristics
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 130nm | BCD+ | — |
Specifications
Identity
Part Number
MIPI DPHY TX IP T130
Vendor
Silicon Library Inc.
Type
Silicon IP
Standards & Interfaces
MIPI PHY
MIPI D-PHY
Provider
HQ:
Japan
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Frequently asked questions about MIPI PHY IP
What is MIPI DPHY TX IP in TSMC 130?
MIPI DPHY TX IP in TSMC 130 is a MIPI PHY IP core from Silicon Library Inc. listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this MIPI PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.