Vendor: SmartDV Category: MIPI

MIPI CSI-2 Synthesizable Transactor

MIPI CSI-2 Synthesizable Transactor provides a smart way to verify the MIPI CSI-2 component of a SOC or a ASIC in Emulator or FPG…

Overview

MIPI CSI-2 Synthesizable Transactor provides a smart way to verify the MIPI CSI-2 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's MIPI CSI-2 Synthesizable Transactor is fully compliant with standard version 3.0 MIPI Alliance specification and provides the following features.

Key features

  • Supports 3.0 MIPI CSI-2 Specification.
  • Compliant with MIPI CSI2 Bus Specification v1.0 to v1.3, v2.0 to v2.10, v3.0.
  • Full MIPI CSI2 Tx/Rx functionality
  • Support both DPHY and CPHY.
  • Supports forward escape ULPM on all Data Lanes.
  • Supports image applications with varying pixel formats from six to twenty-four bits per pixel.
  • Supports all types of short packets.
  • Supports all types of long packets.
  • Supports all lane configurations.
  • Supports all virtual channel identifiers.
  • Supports virtual channel extension field.
  • Supports line and frame synchronization packets.
  • Supports data scrambling.
  • Supports skew calibration.
  • Supports Smart Region of Interest (SROI).
  • Supports Unified Serial Link (USL).
  • Supports Latency Reduction and Transport Efficiency (LRTE).
  • Supports various methods to interleave the transmission of different image data formats
    • Interleaved data transmission using data type value
    • Interleaved data transmission using virtual channels
  • Supports various methods to interleave the data transmission using data type value
    • Packet level interleaved data transmission
    • Frame level interleaved data transmission
  • Supports high speed mode of operation.
  • Supports various kinds of Tx and Rx error generation and detection
    • SoT error
    • Sync error
    • Word count error
    • Sync length error
    • Checksum error
    • ECC error
    • Timeout errors
  • Supports Compression for RAW Data Types.
  • Supports serial Interface(PHY)
  • Supports PPI Interface

Block Diagram

MIPI CSI-2 Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the MIPI CSI-2 testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation also contains User's Guide and Release notes

Specifications

Identity

Part Number
MIPI CSI-2 Transactor
Vendor
SmartDV
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about MIPI IP core

Keeping Pace with CXL Specification Revisions

As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about MIPI IP cores

What is MIPI CSI-2 Synthesizable Transactor?

MIPI CSI-2 Synthesizable Transactor is a MIPI IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this MIPI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP