Memory interface IP cores provide the critical connectivity layer between processing elements and memory devices, enabling high-bandwidth, low-latency, and power-efficient data access in modern SoC, ASIC, AI, networking, and high-performance computing designs.
This category includes DDR, LPDDR, GDDR, HBM, NAND Flash, and NOR Flash interface IP solutions, covering memory controllers, PHYs, controller-PHY subsystems, training engines, calibration logic, and complete memory interface architectures. These IP cores are designed to maximize memory bandwidth, optimize latency, ensure signal integrity, and simplify integration across advanced semiconductor process nodes.
TSMC CLN16FFCLLLVT 16nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN16FFCLLLVT 16nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN16FFCLL 16nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN16FFCLL 16nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN16FFCLL 16nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN12FFCLLLVT 12nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN12FFCLLLVT 12nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN12FFCLLLVT 12nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN12FFCLL 12nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN12FFCLL 12nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
TSMC CLN12FFCLL 12nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adj…
LPDDR5/4x/4 PHY IP for Samsung 14LPU
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
Features a mixed-signal architecture that addresses the challenges of DRAM integration in high-performance and low-power environm…
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
LPDDR5/4x/4 combo PHY on 14nm, 12nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency.
Delivers excellent performance in addition to high utilization and ultra-low latency, achieved by its proprietary out-of-scheduli…
DDR 4/3 Memory Controller IP - 2400MHz
This memory controller supports DDR3/4 SDRAM.