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In this work, the authors show that while replacing HBM with HBF can address the capacity problem, doing so naively severely impacts performance due to HBF’s long tail memory latency starving GPU schedulers. To address this, they propose a Heterogeneous Memory Architecture (HMA) that combines HBM and HBF through a prediction-based migration policy to keep high latency HBF off the GPU’s critical path.
ONFI 5.2 is the latest generation of ONFI device standard, published in 2024. ONFI 5.2 devices have added several major features over previous generation ONFI standards.
Here, the authors propose a concealable PUF using V-NAND flash memory by generating PUF data through weak Gate-Induced-Drain-Leakage (GIDL) erase. The differences in doping depth among V-NAND strings arising from the fabrication cause variations in GIDL erase performance. The resulting V-NAND PUF demonstrated ideal security characteristics while maintaining 100% accuracy under variations in read count and temperature.
Embedded flash and its off-chip counterpart, NOR flash, have been the gold standards for non-volatile memory — the kind used for persistent or long-term data storage — for many years.
Embedded flash memory is reaching its limits as technology nodes for embedded applications shrink below 28nm
Systems using SoCs designed in advanced processes generally rely on external Flash devices that use NOR/NAND Flash memory technology for non-volatile storage. NOR Flash memory offers many benefits for device manufacturers and consumers, such as faster reading, low power consumption, and smaller area. In contrast, NAND Flash memories are ideal for applications such as data storage, where higher memory capacity and faster write and erase operations are required.
