Vendor: VISENGI Category: Video Processing

JPEG Extended Encoder

This IP core has been developed to be a standards compliant JPEG Extended Encoder.

Overview

This IP core has been developed to be a complete standards compliant JPEG Extended Encoder.

Key features

  • Extended and Baseline DCT compression according to JPEG ITU-T T.81 | ISO/IEC 10918-1 standard.
  • JFIF 1.02 standard file header.
  • HDR: from 8 to 36 bpp (bits per pixel) pixel data width, runtime selectable, RGB and YCbCr.
  • On-the-fly selectable quality level/compression ratio from 1 to 100 to achieve any bitrate.
  • Drag'n'drop IP block for Xilinx Vivado Block Design and Intel Quartus Qsys.
  • Constant throughput: 1 pixel per cycle grayscale, or 2 compressed pixels every 3 clock cycles color
  • Industry standard interfaces: AXI-Lite slave for configuration/status and AXI3/4 master for pixel-input/encoded-output.
  • Embedded DMA engines in AXI3/4 interfaces for direct connection to a memory controller. Support for high latency memories.
  • Optional AXI4-Stream Pixel-Input and Encoded-Output interfaces.
  • Optional SW control of the IP core configuration registers (sample source code provided)
  • Selectable JPG chroma subsampling (4:4:4, 4:2:2, 4:2:0), independent of input subsampling.
  • Unlimited image resolution (up to 64K x 64K as per JPEG spec.).
  • Unlimited Restart markers support.

What’s Included?

  • Technical support via email
  • IP Core Datasheet
  • Xilinx Vivado drag'n'drop instance
  • Intel Quartus Qsys drag'n'drop instance
  • Linux driver for embedded setups
  • Example SW control application

Specifications

Identity

Part Number
JPEG_Extended_Encoder
Vendor
VISENGI
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Spain

Learn more about Video Processing IP core

VISENGI Announces 8K30 capable H.264 Encoder on Zynq-7030

VISENGI unveiled on September 30th at Altera SoC Developer Forum in Santa Clara, California, the availability of the smallest 8K H.264 Encoder in the market, capable of delivering 8K 25 fps on the mid-range Altera Arria 10 FPGAs, and now an overwhelming 8K 30 fps on the small and low-cost Xilinx Zynq-7030 FPGA.

Frequently asked questions about Video Processing IP

What is JPEG Extended Encoder?

JPEG Extended Encoder is a Video Processing IP core from VISENGI listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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