Overview
JPEG 2000 HD encoder board, is a PCI-Express acceleration board for performing JPEG 2000 compression. It can process one stream of 1080p60, or multiple streams at lower resolutions, in real time.
Featuring a unique rate allocation module, the encoder board an encode untiled images with resolutions up to 1080p. Moreover, its programmable configuration in constant bitrate or constant quality modes allows the user to generate highquality JPEG 2000 codestreams at various bitrates.
Its compactness makes the encoder board an excellent alternative to PC clusters, offering real-time encoding capability in a PCIe form factor. In addition, it is built on FPGA technology, which offers the advantages of flexibility and upgradeability.
The JPEG 2000 ncoder board can be used for various broadcast or other applications, including Acquisition, Storage, Archiving, Production and Contribution.
Learn more about Video Processing IP core
This paper describes an FPGA-based high-definition video processing platform. The platform supports a wide range of applications including flat-panel TV, projection TV and video monitor.
Configurable Processors for Video Processing SOCs
Programmable FPGA devices are the perfect choice for interfacing with multiple high-resolution image sensors simultaneously...
A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing
Building a high-performance, quad-channel H.264 encoder using low-cost, low-power FPGA architecture.
Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.
