MIPI DPHY Bidirectional 2 Lanes - GF 40LP 2.5V
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
- MIPI D-PHY
- GlobalFoundries
- 40nm
- LP
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
MIPI DPHY Bidirectional 2 Lanes - GF 40LP 2.5V
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Rx-Only 4 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Rx-Only 2 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Bidirectional 4 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Bidirectional 2 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Bidirectional 4 Lanes - GF 22FDSOI18, N/S, for Automotive, ASIL B Random, AEC-Q100 Grade 1
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC7FF 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC6FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC6FF 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC N7 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC N7 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…