Learn more about GPIO IP core
Maximize limited package pins with IO that can act as high-speed test ports then be reused as low-power GPIOs during field operation.
This paper attempts to redefine these existing system level solutions using I3C and examine the improvements it can bring over I2C based solutions. Furthermore, it presents a seamless and risk free migratory path to the industry from these I2C based architectures to I3C based architectures using proven Synopsys Solutions.
This paper will explore how processors have evolved with attributes such as configurability and extensibility to enable the next generation of electronics.
The DesignWare® IP solution for the AMBA 3 AXI protocol enables designers to quickly and easily integrate the high-speed protocol into their (SoC) designs, while reducing risk and speeding time to results
This whitepaper explains the need for ULL GPIOs, the optimization techniques used to reduce leakage, and the inherent tradeoffs to consider. Finally, it describes how Synopsys ULL GPIOs help designers reduce leakage while achieving the SoC power and performance targets for mobile and battery-driven devices used in AI and sensing applications.
In the second of a three-part series of articles on virtual prototyping, Achim Nohl explains how to use the Synopsys Virtualizer Development Kit (VDK) and describes the hardware/software integration flow for a sensor subsystem for use in an Android mobile device. For the remainder of this series, we will illustrate virtual prototyping usage and early software development by means of a brief case study. The case study is centered on a multi-function sensor controller subsystem which supports an accelerometer, magnetic field, orientation, gyroscope, light, pressure, temperature, and proximity.