High-Speed 3.3V I/O library with 8kV ESD Protection in TSPCo 65nm
A 3.3V wirebond I/O library with 8kV HBM ESD protection, a 1.2Gbps LVDS, GPIO, and I2C compliant ODIO in an ultra-small footprint.
Overview
A 3.3V wirebond I/O library with 8kV HBM ESD protection, a 1.2Gbps LVDS, GPIO, and I2C compliant ODIO in an ultra-small footprint.
This library ensures robust reliability in challenging environments, with capabilities including 8kV HBM, 500V CDM, and a robust 2kV IEC 61000-4-2 system stress capability. Its compact footprint makes it ideal for applications where size is critical.The LVDS offers six drive strength settings and 1.2Gbps TX and RX speeds, all in a 140x100um package. GPIO functionality supports frequencies up to 100MHz for transmission and 270MHz for receiving, with selectable 50kohm pull- up/down resistors for enhanced integration flexibility. The library is ODIO compliant, compatible with I2C protocols, and features an RF analog cell with 290fF self-capacitance and high 8kV ESD protection.
Operating Conditions
| Parameter | Value |
| VDDIO | 3.3V +/- 10% |
| Core VDD | 1.2V +/- 10% |
| Tj | -40C to 125C |
Cell Size and Metal Stack
| Cell Size | Metal Stack |
| 70x100um | 1P7M1L1F |
Library Cell Summary
| Cell Type | Feature |
| Supply/ESD | 1.8 - 3.3V;0.9V; GND |
| GPIO | 100 MHz |
| ODIO | I2C Compliant |
| LVDS | 1.2Gbps TX and RX |
| RF Cell | <300fF |
Standards
- 3.3V LVCMOS
- I2C Standard
- LVDS
Key features
GPIO Features
- 100MHz rail-to-rail transmission
- 270MHz LVCMOS compliant receiver with hysteresis
- 50k pull up/down.
LVDS Features
- 1.2Gbps LVDS transmitter and receiver
- 6 drive strengths
- Selectable 300MHz TTL compliant receiver
Standards
- 3.3V LVCMOS
- I2C Standard
- LVDS
Block Diagram
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about GPIO IP core
GPIO Solutions for CERN’s Radiation-Hardened Applications
A Generic Solution to GPIO verification
Radiation-Hardened by Design: Building Interfaces for Space and Nuclear on TSMC CMOS
How AI and Edge Computing Are Accelerating RISC-V Adoption
Ensuring reliability in Advanced IC design
Frequently asked questions about GPIO Pad Library IP cores
What is High-Speed 3.3V I/O library with 8kV ESD Protection in TSPCo 65nm?
High-Speed 3.3V I/O library with 8kV ESD Protection in TSPCo 65nm is a GPIO IP core from Certus Semiconductor listed on Semi IP Hub.
How should engineers evaluate this GPIO?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.