Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: GPIO

GSMC 0.18um 1.8V/3.3V DUP I/O Library

VeriSilicon GSMC 0.18um 1.8V/3.3V DUP I/O Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Cor…

Overview

VeriSilicon GSMC 0.18um 1.8V/3.3V DUP I/O Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Logic 1P5M Salicide 1.8/3.3V process. This library supports Device Under Pad (DUP). It can take 5V tolerance and work with configurable and variable driving strength between 2mA - 24mA.

Key features

  • GSMC 0.18um Logic 1P5M Salicide 1.8V/3.3V process
  • Low area and low cost design using DUP technique
  • 3.3V IO, 1.8V core, 5V tolerant
  • Configurable output driving capability with different slew rate
  • Supports configurable pull up and pull down resistor
  • Supports both CMOS input and Schmitt input with LVTTL compatible
  • Both inline and staggered compatible IO pads
  • Suitable for five metal layers of physical design
  • Provides 2Mhz ~ 27Mhz OSC IO cell
  • Competitive pad pitch and height

Specifications

Identity

Part Number
GSMC18_DUPIO_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Frequently asked questions about GPIO Pad Library IP cores

What is GSMC 0.18um 1.8V/3.3V DUP I/O Library?

GSMC 0.18um 1.8V/3.3V DUP I/O Library is a GPIO IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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