Vendor: ChipCraft Category: GPIO

General Purpose Input/Output Controller

The CC-GPIO-APB is a synthesisable Verilog model of a General Purpose Input/Output Controller.

Overview

The CC-GPIO-APB is a synthesisable Verilog model of a General Purpose Input/Output Controller. The GPIO core can be efficiently implemented on FPGA and ASIC technologies.

Key features

  • AMBA APB3 bus
  • Individual configuration of each GPIO pin
  • Dynamic programming of each GPIO pin as input or output
  • Configurable level or edge triggered interrupts
  • Alternative functions support
  • Fully synthesizable synchronous design with positive edge clocking
  • DFT ready

Block Diagram

Benefits

  • Synthesizable RTL Verilog source code
  • Technology independent IP Core
  • Suitable for FPGA and ASIC
  • Silicon and FPGA proven
  • Easy SoC integration
  • Full implementation and maintenance support with individual approach
  • Flexible licensing scheme

What’s Included?

  • Verilog RTL source code
  • Verification suite
  • Datasheet and integration guide
  • C-header file
  • Constraints
  • Technical support

Specifications

Identity

Part Number
CC-GPIO-APB
Vendor
ChipCraft
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Poland

Frequently asked questions about GPIO IP cores

What is General Purpose Input/Output Controller?

General Purpose Input/Output Controller is a GPIO IP core from ChipCraft listed on Semi IP Hub.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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