Vendor:
Syntill8 Ltd.
Category:
SPI / QSPI XSPI
Four-Wire slave IP for use with the Mentor M8051W and M8051EW
The M4WIS adds four-wire slave capability to the M8051W and M8051EW microcontroller designs that are compatible with the I2C Fast…
Overview
The M4WIS adds four-wire slave capability to the M8051W and M8051EW microcontroller designs that are compatible with the I2C Fast protocol. Clock stretching can be achieved under register control in order to implement flow control. Use of standard synchronous design methodology makes this core simple to integrate into both ASIC SoC and FPGA designs.
Key features
- Implementation of a four-wire synchronous full-duplex slave interface, compatible with the Motorola SPI bus.
- Supports various message protocols using byte granularity data.
- Programmable clock phase and clock and select polarity.
- Supports any four-wire clock rate, independent of microcontroller clock rate.
- Integral transmit and receive data FIFOs minimise the processor overhead required to service the link.
- Supports both interrupt-driven and polled transfers.
- Rests in power saving mode when the interface is not enabled.
- Slave select wake up feature can be used to cold start a M8051W and M8051EW microcontroller, in addition to interrupt driven wake ups.
- Binds tightly to M8051W and M8051EW external interrupt and SFR buses with no additional glue logic required.
Block Diagram
M4WIS - 265943 block diagram
Benefits
- The M4WIS is designed to bind tightly to an M8051W or M8051EW SFR bus. Data, control and status information are exchanged with the host microcontroller using memory-mapped 8-bit words. A single interrupt signal is used to indicate that a matching address has been received, that data buffers require service or that an exception has been detected. Use of standard synchronous design methodology makes this core simple to integrate into both ASIC SoC and FPGA design
What’s Included?
- VHDL '93 and Verilog 2001 RTL source code
- VHDL and Verilog functional demonstration testbench
- Demonstration assembler code
- Simulation scripts for Modelsim
- Detailed product specification and a user guide containing implementation notes
Specifications
Identity
Part Number
M4WIS - 265943
Vendor
Syntill8 Ltd.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
United Kingdom
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Frequently asked questions about SPI / QSPI / xSPI IP cores
What is Four-Wire slave IP for use with the Mentor M8051W and M8051EW?
Four-Wire slave IP for use with the Mentor M8051W and M8051EW is a SPI / QSPI XSPI IP core from Syntill8 Ltd. listed on Semi IP Hub.
How should engineers evaluate this SPI / QSPI XSPI?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SPI / QSPI XSPI IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.