ROM Compiler IP, UMC 0.13um process
UMC 0.13um 1.2V Logic fusion process synchronous VIA1 ROM memory compiler.
- UMC
- 130nm
- HS
ROM Compiler IP, UMC 0.13um process
UMC 0.13um 1.2V Logic fusion process synchronous VIA1 ROM memory compiler.
ROM Compiler IP, UMC 0.11um SP process
UMC 0.11um high speed Logic process synchronous Via-1 ROM memory compiler.
ROM Compiler IP, UMC 0.11um LL process
UMC 0.11um LL process synchronous Via-1 ROM memory compiler.
ROM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Enhancement) Logic process synchronous via-1 ROM memory compiler.
ROM Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.110um eFlash HS process Via1 ROM compiler.
Ring Oscillator IP, Output: 8KHz, UMC 0.11um HS/AE process
Self-contained ring oscillator, frequency 8KHz.
Ring Oscillator IP, Output: 32KHz, UMC 0.11um eFlash/LL process
Self-contained ring oscillator, frequency 32KHz.
RC Oscillator IP, RC-Oscillator, Output: 32KHz, UMC 0.13um HS/AE process
Internal-R, trimmable fixed frequency 70MHz.
RC Oscillator IP, Output: 40MHz, UMC 0.18um G2 process
Internal-RC, frequency 40MHz.
RC Oscillator IP, Output: 30MHz, UMC 0.25um process
Internal-RC, trimmable frequency 30MHz, VCCA=2.0V~3.0V VBG=1.23V, UMC 0.25um Logic process.
RC Oscillator IP, Output: 25KHz/33MHz, UMC 0.18um G2 process
Internal-RC, trimmable frequency selected 25 KHz/33MHz, VCCA=1.2V~1.8V, VBG=0.615, UMC 0.18um GII Logic process.
RC Oscillator IP, Output: 15MHz - 50MHz, UMC 0.25um process
External-R, frequency 15MHz~50MHz.
Power on Reset IP, UMC 0.25um MS process
Vrr=1.6V Vfr=1.4V, core type, Power On Reset with tunable reset time by external capacitor, UMC 0.25um Logic/MMC process.
Power on Reset IP, UMC 0.25um process
Power on Reset with Vrr and Vfr., Power On Reset, UMC 0.25um Logic process.
Power on Reset IP, UMC 0.25um process
Power on Reset with Vrr and Vfr., Power On Reset, UMC 0.25um Logic process.
Power on Reset IP, UMC 0.25um process
Power on reset using 0.25um process, A-type IO, Urr=1.8V, Ufr=1.6V, UMC 0.25um Logic process.
Power on Reset IP, UMC 0.11um eFlash process
Power on reset(POR) block, UMC 0.11um e-flash process.
Power on Reset IP, Input: 3.3V, UMC 0.11um HS/AE process
Vrr=2.2V Vfr=2.0V, B type IO, input VCCK=1.2V VCC3IO=3.3V, 3.3V Power On Reset, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Power on Reset IP, Input: 3.3V, UMC 0.11um eFlash process
Vrr=2.2V, Vfr=2.0V, A type IO, 3.3V Power On Reset, UMC 0.11um AL eFlash process.
Power on Reset IP, Input: 2.5V, UMC 0.25um MS process
Power on Reset circuit tolerant with 0.25um, 2.5V MMC and Logic process VCC=2.5V, B type IO, Power On Reset, UMC 0.25um Logic pro…