2 Input Power Switch; UMC 55nm LP/RVT LowK Logic Process
2 Input Power Switch; UMC 55nm LP/RVT LowK Logic Process
- UMC
- 55nm
- LP
2 Input Power Switch; UMC 55nm LP/RVT LowK Logic Process
2 Input Power Switch; UMC 55nm LP/RVT LowK Logic Process
Input VCC=1.1V& VCC3V=3.3V, 1.1/3.3V Power On Reset; UMC 40nm LP Logic Process
Input VCC=1.1V& VCC3V=3.3V, 1.1/3.3V Power On Reset; UMC 40nm LP Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP Logic Process
Input VCC=1.2V& VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm LP Logic Process
Input VCC=1.2V& VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm LP Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP/SST Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP/SST Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm eflash Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm eflash Logic Process
Input VCC18V=1.8V, 1.8V Power On Reset; UMC 28nm HPC Logic Process
Input VCC18V=1.8V, 1.8V Power On Reset; UMC 28nm HPC Logic Process
Input VCC3V=3.3V, 3.3V Power On Reset; UMC 40nm LP Logic Process
Input VCC3V=3.3V, 3.3V Power On Reset; UMC 40nm LP Logic Process
1.8V RTC Power-On-Reset, UMC 28nm HPC Process
1.8V RTC Power-On-Reset, UMC 28nm HPC Process
Input VCC3V=3.3V, 3.3V Power On Reset; UMC 55nm LP Logic Process
Input VCC3V=3.3V, 3.3V Power On Reset; UMC 55nm LP Logic Process
Input VCC3V=3.3V, 3.3V Power On Reset without Vfr; UMC 55nm LP Logic Process
Input VCC3V=3.3V, 3.3V Power On Reset without Vfr; UMC 55nm LP Logic Process
3.3V RTC Power On Reset; UMC 55nm uLP Logic Process
3.3V RTC Power On Reset; UMC 55nm uLP Logic Process
3.3V RTC Power On Reset; UMC 55nm uLP/SST Logic Process
3.3V RTC Power On Reset; UMC 55nm uLP/SST Logic Process
3.3V Power On Reset, Vrr=1.90 without Vfr, UMC 40nm LP/RVT LowK Logic Process
3.3V Power On Reset, Vrr=1.90 without Vfr, UMC 40nm LP/RVT LowK Logic Process
Vrr=0.63V,Vfr=0.56V,input VCC=0.9V, 0.9V Power On Reset; UMC 28nm HPC Logic Process
Vrr=0.63V,Vfr=0.56V,input VCC=0.9V, 0.9V Power On Reset; UMC 28nm HPC Logic Process
Input VCC=0.9V, 0.9V Power On Reset without Vfr; UMC 28nm HPC Logic Process
Input VCC=0.9V, 0.9V Power On Reset without Vfr; UMC 28nm HPC Logic Process
Vrr=0.8V,Vfr=0.65V,input VCC=1.2V, 1.2V Power On Reset; UMC 55nm e-flash Logic Process
Vrr=0.8V,Vfr=0.65V,input VCC=1.2V, 1.2V Power On Reset; UMC 55nm e-flash Logic Process
Vrr=1.45V Vfr=1.35V, input 1.8V, Core type; Power On Reset; UMC 0.18um Logic GII process
Input VCC18V=1.8V, 1.8V Power On Reset for North-South Orientation; UMC 28nm HPC Logic Process
Input VCC18V=1.8V, 1.8V Power On Reset for North-South Orientation; UMC 28nm HPC Logic Process
Input VCC18V=1.8V, 1.8V Power On Reset for East-West Orientation; UMC 28nm HPC Logic Process
Input VCC18V=1.8V, 1.8V Power On Reset for East-West Orientation; UMC 28nm HPC Logic Process