Power input 3.3v or 1.8v, 2-set voltage detector, UMC 28nm HPC Logic Process
Power input 3.3v or 1.8v, 2-set voltage detector, UMC 28nm HPC Logic Process
- UMC
- 28nm
- HPC
Power input 3.3v or 1.8v, 2-set voltage detector, UMC 28nm HPC Logic Process
Power input 3.3v or 1.8v, 2-set voltage detector, UMC 28nm HPC Logic Process
2-sets voltage detector; UMC 55 nm Logic LP/RVT Low-K Process
2-sets voltage detector; UMC 55 nm Logic LP/RVT Low-K Process
programmable voltage detector; umc55nm eflash
programmable voltage detector; umc55nm eflash
2-sets voltage detector; UMC 55nm eflash LP/RVT Process
2-sets voltage detector; UMC 55nm eflash LP/RVT Process
2-sets voltage detector ; UMC 55nm Logic SP/RVT Low-K Process
2-sets voltage detector ; UMC 55nm Logic SP/RVT Low-K Process
4-Level Voltage Detector for USB-OTG ; UMC 28nm HPC Process
4-Level Voltage Detector for USB-OTG ; UMC 28nm HPC Process
4-Level Voltage Detector for USB-OTG ; UMC 55nm 2.5V overdrive 3.3V device LP/HVT LowK Logic Process
4-Level Voltage Detector for USB-OTG ; UMC 55nm eflash LP/RVT Process
4-Level Voltage Detector for USB-OTG ; UMC 55nm eflash LP/RVT Process
4-level detector for USB-OTG applications, input 3.3V; UMC 0.11um eFlash Logic process_x005F_x000D_
4-level detector for USB-OTG applications, input 3.3V; UMC 0.11um eFlash Logic process
Voltage Detect Vdet1=2.8V,Vhys1=0.1V, Vdet2=2.6V, Vhys2=0.1V.Vdet2 rsie delay>10ms, fall delay
Power input 1.1v, 4-level voltage detector, UMC 40nm LP/HVT LowK Logic process
Power input 1.1v, 4-level voltage detector, UMC 40nm LP/HVT LowK Logic process
Power input 3.3v, 1-level voltage detector, UMC 40nm LP/RVT LowK Logic process
Power input 3.3v, 1-level voltage detector, UMC 40nm LP/RVT LowK Logic process
Voltage detector; UMC 55nm Logic SP/RVT Low-K Process
Voltage detector; UMC 55nm Logic SP/RVT Low-K Process
Voltage Detect Vdet=2.5V Vhys=0.1V, generate a high/low level logic for a precise power supply monitoring system; UMC 90nm SP/RVT…
Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process
Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process
Input 20M-66M Hz, output 500M-1000M Hz, frequency synthesizable PLL; UMC 55nm EFLASH RVT LowK Logic Process
A 10bit 1ksps temperature to digital converter ; UMC 28nm HPC/RVT Logic and Mixed-mode Process
A 10bit 1ksps temperature to digital converter ; UMC 28nm HPC/RVT Logic and Mixed-mode Process
5V 1W Mono Speaker Amplifier, UMC 55nm SP/RVT LowK Logic Process.
5V 1W Mono Speaker Amplifier, UMC 55nm SP/RVT LowK Logic Process.
28nm HPC x4 lane 10 Gbps SERDES
28nm HPC x4 lane 10 Gbps SERDES
Source Low Dropout Linear Regulator for Cascade IO ; UMC 28nm HPC Process
Source Low Dropout Linear Regulator for Cascade IO ; UMC 28nm HPC Process