UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)
- UMC
- 28nm
- HPC
- Pre-Silicon
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/HVT Logic Process 9-track Standard cell ECO_M1 CORE library (C38)
UMC 28nm HPM/HVT Logic Process 9-track Standard cell ECO_M1 CORE library (C38)
UMC 28nm HPM/HVT Logic Process 9-track Standard ECO_M1 cell library (C35)
UMC 28nm HPM/HVT Logic Process 9-track Standard ECO_M1 cell library (C35)
UMC 55nm ULP/uHVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias.
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60)
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C90) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track ECO M1 Cell Library (C60) w/ Forward Bias.