UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library
- UMC
- 55nm
- Silicon Proven
UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/LVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/LVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library
UMC 55nm ULP/uHVT Low-K Logic Process Process 6-track Generic Core Cell Library (C90) w/ Forward Bias.
UMC 55nm uLP/uHVT LowK Logic Process Ultra High Density (6T) Generic Core Cell Library
UMC 55nm uLP/uHVT LowK Logic Process Ultra High Density (6T) Generic Core Cell Library
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60). W/O deep Nwell
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60).
UMC 55nm ULP/LVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60)
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track Generic Core Cell Library (C90) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60).W/O deep Nwell.
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track Generic Core Cell Library (C60).W/O deep Nwell.
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track Generic Core Cell Library (C90)
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track Generic Core Cell Library (C90)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library
UMC 28nm HPM/RVT Logic Process 12-track generic_core library with LMINUS (C31)
UMC 28nm HPM/RVT Logic Process 12-track generic_core library with LMINUS (C31)
UMC 28nm HPM/LVT Logic Process 12-track generic cell library
UMC 28nm HPM/LVT Logic Process 12-track generic cell library
UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LPLUS (C38)
UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LPLUS (C38)
UMC 28nm HPM/HVT Logic Process 12-track generic_core library (C35)
UMC 28nm HPM/HVT Logic Process 12-track generic_core library (C35)
UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LMINUS (C30)
UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LMINUS (C30)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)